Other Parts Discussed in Thread: CC1352R, SYSCONFIG, UNIFLASH, CC1312R
Hi,
- Board: LPSTK-CC1352R
- SDK: simplelink_cc13x2_26x2_sdk_4_40_04_04
- Xdctool: xdctools_3_62_00_08_core
- SysConfif: 1.7.0
- Example: rfEasyLinkEchoTx_CC1312R1_LAUNCHXL_tirtos_ccs
I am not able to set CC1352R Tx Power to its maximum: 14dBm
I imported the project rfEasyLinkEchoTx_CC1312R1_LAUNCHXL_tirtos_ccs and increased the Tx power from 10dBm (initial value) to 14dBm.
At that point Sysconfig suggested to enable the VDDR:
Device Configuration
So I did it as follow:
CCFG_FORCE_VDDR_HH is properly set in ti_devices_config.c
//##################################### // Force VDDR high setting (Higher output power but also higher power consumption) // This is also called "boost mode" //##################################### // Force VDDR voltage to the factory HH setting (FCFG1..VDDR_TRIM_HH) #define CCFG_FORCE_VDDR_HH 0x1
Then in rfEasyLinkEchoTx.c, I respectively set the Tx power to 0 or +14dBm:
/* * If you wish to use a frequency other than the default, use * the following API: * EasyLink_setFrequency(868000000); */ EasyLink_setFrequency(916000000); /* if I uncomment the line below, the Tx power measured is ~10dBm */ //EasyLink_setRfPower(14); /* if I uncomment the line below, the Tx power measured is ~0dBm */ //EasyLink_setRfPower(0);
After the build, I verified that the CCFG is located on the last page of the internal Flash:
.ccfg 0 00057fa8 00000058 00057fa8 00000058 ti_devices_config.obj (.ccfg:retain)
I also made sure that Uniflash update it sucessfully:
[3/22/2021, 9:14:07 PM] [INFO] Cortex_M4_0: Writing Flash @ Address 0x00057fa8 of Length 0x00000058 [3/22/2021, 9:14:08 PM] [INFO] Cortex_M4_0: Chunk 1: addr=0x00057FA8, length=88, crc=0x64F061F1 (using block 1) [3/22/2021, 9:14:08 PM] [SUCCESS] Program Load completed successfully.
So far, I demonstrated that CCFG_FORCE_VDDR_HH is set and the CCFG is properly flashed.
However, with the spectrum analyzer:
the Tx power measured is:
- +10dBm with EasyLink_setRfPower(14);
- 0dBm with EasyLink_setRfPower(0); (which validate my setup)
It seems that CCFG_FORCE_VDDR_HH is not taken into consideration.
Questions:
Q1) Do you have any suggestions?
Q2) Also from the Technical Reference Manual:
For the CC13x2 device only:
To enable output power of +14 dBm, the CCFG_FORCE_VDDR_HH define must be set to 1 in ccfg.c
distributed in cc13xxware by TI. If CCFG_FORCE_VDDR_HH is set to 0 the maximum possible output
power is +12.5 dBm.
Basically, if the issue was only related to the CCFG_FORCE_VDDR_HH (set to 0 instead of 1), I should at least measure +12.5dBm (instead of +10dBm)
So, Is the Tx power table (generating by SysConfig) correct?
As a side note, from SysConfig, I set the frequency to 916Mhz but the Tx Power table mentioned 868MHz...
// 868 MHz, 13 dBm
RF_TxPowerTable_Entry txPowerTable_868_pa13[TXPOWERTABLE_868_PA13_SIZE] =
{
...
{12, RF_TxPowerTable_DEFAULT_PA_ENTRY(16, 0, 0, 82) },
// The original PA value (12.5 dBm) has been rounded to an integer value.
{13, RF_TxPowerTable_DEFAULT_PA_ENTRY(36, 0, 0, 89) },
// This setting requires CCFG_FORCE_VDDR_HH = 1.
{14, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 1, 0) },
RF_TxPowerTable_TERMINATION_ENTRY
};
Sincerely