CC1200: Recommendations for QAM RX?

Part Number: CC1200

We wish to use the CC1200 to provide I/Q or Magnitude/Phase for use with an external QAM slicer and have some questions:

1.  Are there any known advantages of using the CHFILT_I and CHFILT_Q outputs as compared to the MAGN and ANG outputs with respect to performance?  Do they all work?

2.  What are the parameters which determine the sampling rate or alternatively which formula in the data sheet would be relevant for calculating the sampling rate?

3.  What kind of maximum SNR might be expected given a strong signal and appropriate channel filter settings for a 25 kHz wide signal?

4.  What tradeoffs would be expected to limit the performance (for example sampling rate vs settings which determine the noise bandwidth)?

5.  What settings of key parameters would be recommended?

6.  Anything else we should know about this approach?


  • 1) Both should work, they are just from different places in the receive chain. What you should look at is if it's possible to read out the registers in the rate you require since you need to read out 6 vs 5 registers in a given time.

    2) I believe the internal oversampling is 4x of the programmed datarate.

    3) Not sure what you define as a maximum SNR here. At the sensitivity limit the required SNR is about 7- 8 dB for (G)FSK

    I haven't seen this exact use case and hence I'm not sure which limitations you will see. 

  • Although it would be nice if the internal oversampling were related to the programmed data rate, I found this statement regarding the AGC integration window:  "Samples refer to the RX filter sampling frequency, which is 4 times the programmed RX filter BW."

    1.  Would you agree that this would seem to apply to the I/Q samples as well?   

    On a related topic, we had to struggle to understand EXACTLY how the timing in this part works over the last few years, much of which by trial and error.  One of the biggest surprises was that many of the internal timing parameters are linked to the RX filter BW rather than to the programmed data rate as suggested occasionally in the data sheet.  

    2.  Could you please provide the community with a block diagram showing how the part actually works, in particular depicting how the various different parameters are related due to the dividers which create the internal clock rates?  That would be SO useful!  If needed, we can do an NDA exchange.

    On a personal note for TER, I so appreciate the years of support you have provided the community on these parts!  THANK YOU!!!

  • The engineer that have the overview of the modem is allocated more than 100 % on a different project making it difficult to get more details. 

    I don't think we have a good figure that shows the internal clocking and so on that we are able to share, even with a NDA in place. 

    Looking through some old posts it looks like some bit streams are clocked with a 4*RXBW rate, others with 4*datarate. I would recommend playing with these two parameters and see how the output rate is affected.