Test Scenario - CC1200 is operating in Synchronous serial mode and we are using bit banging SPI communication for CC1200 configuration changes.
- When we keep switching between RX and TX mode of CC1200 using SRX and STX commands, the RX_FIFO_ERROR is observed in MARC_STATE register.
- When above error comes up, the MODEM_STATUS0 register shows that RX_FIFO_EMPTY and RX_FIFO_UNDERFLOW flags are set in it.
- The PKT_CFG and MDM_CFG registers still reflect that CC1200 is in Synchronous serial mode and RX_FIFO is disabled.
Kindly let us know, if there is any possibility by which in synchronous serial mode, the CC1200 will try to read RX FIFO(ideally it should not use FIFOs in Synchronous serial mode)?
When the FIFO Error is observed, all the configuration registers still reflects that CC1200 is working in Synchronous serial mode, then why RX FIFO is being read?