Other Parts Discussed in Thread: CC3235SF
I am working with CC3235SF's ADC and GPIO modules. I am using the ADC channels 1,2 and 3 which uses GPIO3(pin 58), GPIO4(pin 59) and GPIO5(pin 60) respectively.
I have configured these ADC modules and their pins accordingly in the *.syscfg of the project.
In my application, I want to use the ADC channels as and when required and, when the read_once() functionality is over I want to configure the pins mentioned above as GPIO and set them high/low as required.
I am performing the below steps:
- ADC_open() => pass the CONFIG_ADC_x as per the user input for returning an ADC handle.
- ADC_close() => Now, as per my understanding, this function sets the ADC pin for the mentioned module to the reset state. So, it becomes easy to change the pin functionality from analog to digital.
I am trying to set the pin to GPIO immediately after calling the ADC_close() function (the ADC pins are not configured in the GPIO section of the *.syscfg as the hardware is used).
For this I am using the following register access functions:
- Supply clock to the peripheral HWREG(ARCM_BASE + APPS_RCM_O_GPIO_A_CLK_GATING) = APPS_RCM_GPIO_A_CLK_GATING_GPIO_A_RUN_CLK_ENABLE;
HWREG(ARCM_BASE + APPS_RCM_O_GPIO_B_CLK_GATING) = APPS_RCM_GPIO_B_CLK_GATING_GPIO_B_RUN_CLK_ENABLE;
HWREG(ARCM_BASE + APPS_RCM_O_GPIO_C_CLK_GATING) = APPS_RCM_GPIO_C_CLK_GATING_GPIO_C_RUN_CLK_ENABLE;
HWREG(ARCM_BASE + APPS_RCM_O_GPIO_D_CLK_GATING) = APPS_RCM_GPIO_D_CLK_GATING_GPIO_D_RUN_CLK_ENABLE;
HWREG(ARCM_BASE + APPS_RCM_O_GPIO_E_CLK_GATING) = APPS_RCM_GPIO_E_CLK_GATING_GPIO_E_RUN_CLK_ENABLE;
- Set the pin as output uint32_t addr = OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_0 + 0x00000004 * io;
HWREG(addr) = 0b000001100000;
HWREG((GPIOA0_BASE + 0x00001000 * (io/8)) + GPIO_O_GPIO_DIR) |= 0x00000001 << (io%8);
- Update output drive of the pin to high
uint32_t addr = OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_0 + 4 * io;
HWREG(addr) |= 0b000000010000;
However, I am not getting HIGH voltage at the pins and also, I am not able to read the OCP_SHARED_O_GPIO_PAD_CONFIG_0 register even after providing the clock to the peripheral.
I have also tried to use the function MAP_PinTypeGPIO in rom_map.h.
Could someone please guide me through this.