Hi Team,
The FPGA as the slave and the CC3200 as the master device interact with the FPGA through SPI Master mode;
There are a few questions,
- SPI As a Master, calling DMA, under what circumstances can SPI be triggered to read and write? How to set the trigger conditions;
- If the FPGA side data acquisition is full, how to notify the SPI DMA to obtain the handling data?
- What is the trigger condition for SPI as Master SPI_INT_DMARX/TX?
- What are the conditions for this trigger of the SPI as a Master SPI_INT_EOW?
- For FPGAs, if the data acquisition is full, whether cc3200 can be informed by GPIO, and then SPI DMA RX data transceiver and sent and received by interrupt nesting; So how does the corresponding TX trigger?
Best Regards,
Susan Ren
