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CC3301MOD: Issue in Getting Started with CC3301MOD plugged on LP-AM243

Part Number: CC3301MOD
Other Parts Discussed in Thread: CC3301, LP-AM243, UNIFLASH

I have got he BP-CC3301MOD & LP-AM243 for Evaluating the Wi-Fi Features on CC3301 Wi-Fi Module

I have build the below output image using the cc33xx_rtos_mcu_package_R8 SDK.

 cc3xxx_network_terminal/build_cc3xx_release/cc3xxx_network_terminal.appimage

As per the Programming Instructions in CC33XX MCU User Guide

Set the Uart Boot Mode 

Added all the binary file path in program_application_and_wifi_fw.cfg 

Executed the Script py uart_uniflash.py -p COM4 --cfg=program_application_and_wifi_fw.cfg

I am getting error while the 2nd commad in the script is executed i.e for below operation

Program the OSPI PHY tuning attack vector
--operation=flash-phy-tuning-data

send error: expected NAK, CRC, EOT or CAN; got b'2'

PFA screenhot of the Error & the Eval Board .

Kindly request to help resolve this issue.

Screenshot 2025-11-04 141708.png

EvalBoard.jpg

 

  • Hi Subhash, 

    Your setup looks fine. Can you make sure you are using the appropriate power supplies and then try power cycling?

  • Hi Brandon,

    I am using Motorola Edge 50 mobile phone Power Adaptor (USB-C receptacle ) with 5V / 3A output.

    Verified +3.3V (J1.1) & 5V(J3.21) on the Eval Board.

    Tried Power Cycling , it did not help resolve the issue

    ------------

    Tired bypassing the --operation=flash-phy-tuning-data , but  then getting below error for the subsequent command  --file=./sbl_ospi.release.tiimage --operation=flash --flash-offset=0x0,

    Sending ./sbl_ospi.release.tiimage:   0%|                                                             | 0/299700 [00:00<?, ?bytes/s]send error: expected NAK, CRC, EOT or CAN; got b'0'

    Is the error due to some issue with the QSPI communication with Flash.

    --------------------

    Verified the below Boot Message on the Debug Terminal in QSPI Boot Mode.

    Starting NULL Bootloader ...

    DMSC Firmware Version 8.6.4--v08.06.04 (Chill Capybar
    DMSC Firmware revision 0x8
    DMSC ABI revision 3.1

    INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 800000000 Hz !!!
    INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 800000000 Hz !!!
    INFO: Bootloader_runCpu:155: CPU m4f0-0 is initialized to 400000000 Hz !!!
    INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 800000000 Hz !!!
    INFO: Bootloader_loadSelfCpu:207: CPU r5f0-1 is initialized to 800000000 Hz !!!
    INFO: Bootloader_runSelfCpu:217: All done, reseting self ...

    ------------------

    Kindly request to help resolve the error in communicating with the Flash operations executed through the command executions in program_application_and_wifi_fw.cfg

  • Hi Subhash,

    Can you try secure programming, with a .appimage.hs_fs?

    There's a board revision that requires secure programming but I need to double check which one.

  • Hi BLiu

    Executing the script from secured programming folder using the cc3xxx_network_terminal.appimage.hs_fs resolved the Issue.

    Thanks & Best Regards