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wlan_start(1) doesn't work

Other Parts Discussed in Thread: MSP430FG4618, MSP-EXP430FR5739, MSP430FR5739, MSP430F5336, MSP430G2553

Hi, 

I was ported the SPI driver to STM32 MCU. Everything is OK. I can configure the network parameters, I can open a TCP client, sending and receiving TCP data and the same thing for the TCP server.

I use the 1.19 firmware version in my CC3000 and the SPI version 7(ported) and the host driver version 13. As I am telling you, every thing it's OK.

My target now, it's to use your patch programer application (PatchProgrammerLM4F232H5QD-4.11.7.13.19  as referece). But when I try to execute the wlan_start(1) it doesn't work. It is blocking permanetly.

I don't why, because as i told you the rest of the things are OK. If I uses  wlan_start(0), it works fine...

I read that in this mode, it can takes you around 10seconds, in my case i was waiting for it around 2 minutes... Any suggestion? It's a little bit strange, isn't it?

I put a piece of my code, just in case you can help my better:


char *sendDriverPatch(unsigned long *Length)
{
*Length = 0;
return NULL;
}

char *sendBootLoaderPatch(unsigned long *Length)
{
*Length = 0;
return NULL;
}

char *sendWLFWPatch(unsigned long *Length)
{
*Length = 0;
return NULL;
}

void CC3000_UsynchCallback(long lEventType, char * data, unsigned char length)
{

}

main(){

/* WLAN On API Implementation */

wlan_init(CC3000_UsynchCallback, sendWLFWPatch, sendDriverPatch, sendBootLoaderPatch, ReadWlanInterruptPin, WlanInterruptEnable, WlanInterruptDisable, WriteWlanPowerEnable);

/* Trigger a WLAN device */

wlan_start(1);

...

}

Thanks and best regards.

Carlos

  • Hi there,

    it now seems that many of us are facing the same problem, plus surely others who are just following.

    It also seems that TI is NOT WILLING TO SUPPORT.

    It might therefore be a good idea to go to other TI's competitors.

    Has anybody some suggestions or experience with other competitor's similar devices?

    Greetings

    Leo Reyneri

  • All,

    I have responded on a parallel thread (to Brent) few weeks ago. In any case, I tried to reproduce this issue using Stellaris LM4F232H5QD which is the closest to STM32 with both, IAR and CCS but with no luck. It always work and I get the event from HCI_CMND_SIMPLE_LINK_START right after sending the last "FW ack".

    I wonder if it is STM32 related issue that need to be further explored but I do have one test I think worth applying on your side. Since it happens when using init_driver(1), I recommend using init_driver(0) after you write the FAT. The code should look like:

    while

    (return_status)

    {

    // write new FAT

    return_status = fat_write_content(aFATEntries[0], aFATEntries[1]);

    }

    wlan_stop();

    initDriver(0);

    I verified it on my side and it should be OK since at this point, only the FAT is flashed and there is no patch yet. Since there is no patch, you can do anything from the host so it should be OK.

    Please give it a try and let me know.

    Regards and sorry for the delay,

    Shlomi

  • Hi Shlomi,

    many thanks for your answer!

    As written i have the same problem. I am using a NXP LPC1769, not a STM32.

    Your suggestion does only help for someone (not verified if helpful at all) who has a working CC3000.

    When the CC3000 is already dead, the startup does not succeed and therefore the fat_write_content is not reached at all. So to recover the CC3000, it is not needed to change FAT writing, drv/firmware writing, it is bringing up the CC3000 so it does accept real commands (like nvmem_write) again. With the "dead" chip it does not answer on nvmem_write, as well as on nvmem_read_sp_version, simply no answer from them.

    (see first page of this thread or this one here

    http://e2e.ti.com/support/low_power_rf/f/851/t/282698.aspx?pi267162=2 )

    At the moment i think the following people have the same problem on different platforms (all mentioned in this thread or partly mentioned in other thread here in the forum):

    Carlos(LM4F232H5QD)

    Mario (MSP430 based)

    Leonardo (MSP430 based)

    Jua (has one working and one not working platform, not sure what platforms used)

    Martin (NXP LPC1769)

    Brent (MSP430 based)

    @All: Please correct if something is wrong, or i have missed or wrongly listed someone.

    Jua has uploaded SPI traces for a working case. I compared the SPI sequence to my SPI sequence, have not seen any difference. Same bytes transferred, Chip Select (CS) control seems to be the same, same for WLAN_EN. I have tried different SPI setting (clock rate, CPOL, CPHA, ...). No difference on clock rate, with other SPI parameter (CPOL, CPHA) it was not working anymore at all, so the used ones seem to be the only working ones.

    Ideas:

    - I have uploaded serial logs from internal debug pins of CC3000 in this thread. Can please someone from TI have a look if there is something in which can help with this error? I have written multiple times, that there is a trace, but never got feedback that someone has analyzed it.

    - There are module with SP V1.8, SP V1.10 and perhaps more. I think this is mainly the version from software stored in EEPROM. Can i see somewhere/somehow which version is in ROM? Or is there always the same ? Perhaps it is perhaps dependent on software version of ROM. But i think, this could be read by wlan_start(1) and do nvmem_read_sp_version, which is not working because wlan_start is not successful.

    - You have written here

    http://e2e.ti.com/support/low_power_rf/f/851/t/282698.aspx?pi267162=1

    "BIT0 indicates the file is allocated where BIT1 indicates the file is valid."

    (this is in address field of each FAT entry)

    I want to point out BIT1, which means "valid".

    What happens, when in EEPROM the drv or firmware is not marked valid? Can you try this? What happens on your side?

    When you have re-written the FAT, the valid bits for each entry in FAT are reset. When you then write the driver, who/how is it detected as valid? Is there some kind of checksum or length check? What does the patch contain at all? Is it really a "patch" which patches the ROM software? Or just replaces all in ROM? What happens, when there is different ROM software in different modules or is ROM software always the same?

    Now take the case there is something wrong writing the driver and/or firmware, or driver/firmware was not written at all. "Valid" bit is not set, correct? What will it do when the CC3000 is resetted? Driver is not valid, firmware is not valid, does it request the patches from host, even with wlan_start(0).

    - I have seen a case (i am not sure if i can reproduce it), where i even got no patch request at all. This was due to bad EEPROM content. (Note: I am meanwhile using an external EEPROM, which i can easily fill with any binary image, perhaps cases which are internally handled by CC3000. But i think, there is always the possibility that EEPROM gets corrupted for whatever reason and host must be able to recover from this situation via SPI without an external EEPROM programmer, just by rewriting the internal EEPROM.)

    If i can do/test something, please feel free to contact me.

    Best regards,

    Martin

  • Hi,

    wlan_stop simply shut down the chip. It is done prior to init_driver() although it can be omitted since it is done inside pio_init(). BUT, it does no harm. It does not do anything in the EEPROM.

    When you say the module is already dead, can you elaborate the followings:

    • If running the Patch Programmer on a "dead" module, it does pass the first init_driver(1) at the beginning of main(). Is it true?
    • If you change the above to init_driver(0). Does it pass the init?
    • Is there a way to read the EEPROM with external reader (I remember you asked what tool I'm using. Have you managed to work it?)? If not, probing the I2C lines for the EEPROM can shed some light as well

    I'm trying to understand if the EEPROM is already corrupted at this phase. My guess is that none of the commands to the module would work when it is "dead" as the host is probably stuck at the event handler waiting for the init done event.

    Regarding the serial logs, I could see the followings: 8037.trace_2_debug_pins_no_answer.zip and 8816.trace_debug_pins_no_answer.zip. Are you reffering to those? If so, the 8816.trace_debug_pins_no_answer.zip looks strange. The EEPROM cannot be initialized. it seems as if the EEPROM is disconnected on the I2C and cannot read/write anything. In addition, the repeated message indicates a corrupted command coming from the host (some kind of SPI error cause the command opcode to get corrupted). Regarding 8037.trace_2_debug_pins_no_answer.zip, it looks much better since I could see the init, BUT, I expect to see the command for read buffer size (HCI_CMND_READ_BUFFER_SIZE) right after the init done event. BTW, I could see the init done event printed in the log so it is definately going on the SPI lines to the host. For some reason you claim you don't get it  so maybe this is the issue (you claim that after acking the last FW patch request, you don't get anything. You should get the init done event).

    The ROM version is always the same. The nvmem_read_sp_version() simply reads out the patches numbers. The patches are just small pieces of code that are loaded to RAM and invoked whenever a bugous sectionin the ROM is reached. It does not replace the ROM as a whole but rather patch it in the right places. So it is possible to work with no patches and still be able to operate the device but then you are lacking of bug fixes and added features.

    The VALID bit gets written when a successful write operation takes place to the EEPROM. E.g. if you write to the driver patch area, the VALID bit gets set when the data is done. No checksum mechanism. BUT, you do get status in the host. This is why any nvmem_write() is wrapped in while (return_status).

    As far as I remember, if you use init_driver(0) but with no valid patches, the ROM base version is used but with no patches. The only time it requests patches is when you invoke init_driver(1).

    I hope we can get to the bottom of it but it may be that some of th EEPROMs are already corrupted. If you can do the tests I denoted above, it can at least shed light on the status of the EEPROM.

    Regards,

    Shlomi

  • Hello Shlomi,

    i will start the tests now and upload result, traces, info when i have them. I also send confirmation/correction to you question, but try to answer them already before test.

    I answer to your questions:

    Shlomi Itzhak said:

    When you say the module is already dead, can you elaborate the followings:

    • If running the Patch Programmer on a "dead" module, it does pass the first init_driver(1) at the beginning of main(). Is it true?
    • If you change the above to init_driver(0). Does it pass the init?
    • Is there a way to read the EEPROM with external reader (I remember you asked what tool I'm using. Have you managed to work it?)? If not, probing the I2C lines for the EEPROM can shed some light as well

    For question 1 and 2: I have a bit different software, but i think, init_driver(1) and init_driver(0) behave the same and do not return, when having a dead module.

    For question 3: Yes, i can read the EEPROM with external reader and also can probe the I2C lines. I will try to deliver both after my following test.

    Shlomi Itzhak said:
    My guess is that none of the commands to the module would work when it is "dead" as the host is probably stuck at the event handler waiting for the init done event.

    This seems to be correct, but not the host seems to be stuck (perhaps the original host, but not my implementation), because i see on SPI that the command is sent to CC3000.

    I think the most important point:

    Shlomi Itzhak said:
    BTW, I could see the init done event printed in the log so it is definately going on the SPI lines to the host. For some reason you claim you don't get it  so maybe this is the issue (you claim that after acking the last FW patch request, you don't get anything. You should get the init done event).

    I think this is the critical point. What does the "printed in the log" mean? Is it printed to the log, when an answer is generated and queued or can you confirm from the log, that it has left CC3000 on SPI? Furthermore, from behind, the answer is read by the host, correct? The host reads it, when WLAN_IRQ signals this. I think, the WLAN_IRQ is not coming, because then i would have searched a error on my side, why the host has not received it and triggerred a read operation. Could it be that WLAN_IRQ is missing, missing like on normal startup, where the special handling is needed??? Perhaps a solution to wait some time and just try to read an event from CC3000?

    I start my tests now and try to get as much info on the topic as i can.

    Perhaps you can try to upgrade a module and exit the upgrade in the middle of the drv upgrade (e.g. query address and do while(1))? Can you then perhaps reproduce my problem?

    Get back to you in short time!

    Best regards,

    Martin

  • Hi Shlomi,

    btw: where are you located? Just for the time zone, we have around lunch time here.

    btw2: Many thanks for looking into my traces!!! (It could be that one was without a EEPROM. I had done some test with EEPROM removed.)

    One more comment:

    Regarding "HCI_CMND_READ_BUFFER_SIZE": Is it mandatory to do this?

    When i just do firmware upgrade, i do not execute it, because i don't need the info reported back. Or is there some kind of hidden action put on "HCI_CMND_READ_BUFFER_SIZE" which is needed on startup? I think something like read SP version would be more useful instead of read buffer size in startup.

    Best regards,

    Martin

  • Hi Shlomi,

    I am using CC3000 with MSP430FG4618. I have ported patch programmer application and then I have tried to use it. I had alrerady ported SPI to my MCU, with success. On a first attempt, the application stucked in the first init_driver(1), as described by many (i.e. Carlos and Martin) in this post.

    I had changed the first init_driver(1) in the main code (the one before reading the MAC) with init_driver(0), thinking that was the issue (someone in the thread suggested to try it).

    Then the init_driver(0) was executed succesfully but the patch programmer app stucked somewhere else in the program execution (I'm not able to tell you where exaclty, but I guess in the FAT rewriting, since this is the first critical operation, the previous ones are just reads...) and then my module seems to be dead, as Martin has described.

     It is not able to complete wlan_start(0) or wlan_start(1), it stucks and so it's not able to complete the power-up command/response sequence indicated in the Wiki. I think I have damaged the module and now I don't know really how to restore it, since it does not respond anymore.

    In the patch programmer Wiki there is written that newer patch programmer versions are able to restore corrupted EEPROM. Do you think that this can be the case even if we have the problem described so far ? I have read that patch programmer utility of MSP430FR5739 EXP Board (I have one of it, too) can load directly the binary files,but I don't know if this help in our issue...what do you think?

    Thank you for your attention and Best Regards,

    Mario Demaria

  • Hi Shlomi,

    what i have done:

    1) I have filled complete EEPROM with 0xFF via external EEPROM programmer.

    2) I connected EEPROM to CC3000. CC3000 seems to write FAT by itself, can you confirm?

    3) Trace 1:

    I am in SpiInit
    I am in wlan_start
    I am in SpiOpen
    I am in WriteWlanPin(WLAN_DISABLE)
    I am in WriteWlanPin(WLAN_ENABLE)
    Waiting done...
    0200FF00
    MM: Sending 00 01 00 40 01 01
    000000000000
    0200000007
    len=7
    04001002000100
    Init done...
    I am in SpiWrite
    TX-Data:0100070000030102000000FF
    SpiWrite done
    0200000007
    04001002000300
    I am in SpiWrite
    TX-Data:0100070000030302000000FF
    SpiWrite done
    0200000007
    04001002000200
    I am in SpiWrite
    TX-Data:0100070000030202000000FF
    SpiWrite done

    => Here no answer, i wrote last 0xFF, put CS (SSEL in logic analyzer trace) to HIGH, WLAN_IRQ follow to HIGH and never goes LOW again. I see a "0C EF 00" on DEBUG1 and "0B 15 18 00 00 06 2B 16 08 80..." on DEBUG2.

    SPI trace in CC3000-20130827-0001.dvdat
    Internal debug 1 captured in trace-debug1-0001.log

    4) Trace 2

    I am in SpiInit
    I am in wlan_start
    I am in SpiOpen
    I am in WriteWlanPin(WLAN_DISABLE)
    I am in WriteWlanPin(WLAN_ENABLE)
    Waiting done...
    0200FF00
    MM: Sending 00 01 00 40 01 00
    000000000000
    0200000007
    len=7
    04001002000200
    Init done...
    Key 1 done

    => This is just to see that when using "00 01 00 40 01 00" instead of "00 01 00 40 01 01" also here the patches are requested. I have not answered this request by host. If you need a trace with answering, please tell me.

    SPI trace in CC3000-20130827-0002.dvdat
    Internal debug 1 captured in trace-debug1-0002.log

    5) Trace 3: Continuation of Trace 1

    I this situation, host is waiting for not coming answer, no WLAN IRQ occuring (stays HIGH)
    i trigger a read request (by a key press) to CC3000 to see if it is only missing the WLAN IRQ signalling.
    CC3000 answers with "02 00 FE 00 00" (seems to mean "NO DATA"?).
    Perhaps you see something in LA trace on internal debug1 or internal debug2.

    SPI trace in CC3000-20130827-0003.dvdat

    Internal debug 1 captured in trace-debug1-0003.log

    After my test i have read out the EEPROM image for you to see what is now inside.

    I have done the same test multiple times, always same result. So you can take this EEPROM image as base.

    Best regards,

    Martin

  • Here are the traces:

    (logic analyzer: TechTools DigiView DV1-100, but software 6.x.x or 7.x.x by similar TechTools logic analyzer works)

    8787.CC3000-20130827.zip

    Here is the EEPROM image:

    6518.eeprom-20130827.zip

  • Hi Shlomi,

    I think there is some confusion here and would like to try to back up a step.  I am specifically referring to your first post this morning.  (I don't want to distract from the work you and Martin are doing because it looks like he is providing a lot of good data for you.)

    You mentioned you had replied to me on a parallel thread a few weeks back.  This is most likely a different issue since I only ran into this specific problem last week.  I am not sure which thread you are referring to.  The smart config issue I saw?  Anyway, that would not be a related issue.

    Next, you refer to using init_driver(0) after writing the FAT.  I am not sure when that actually occurs since the comments in the code are few and far between but the only reference I see to the FAT is a comment about booting from the new FAT which occurs a long way after my lock up occurs.  Mine locks up inside the first initDriver(1) routine.  (I believe the hierarchy is: initDriver(1), wlan_start(1), SimpleLink_Init_Start(1) and that is where it is locked, waiting for the event to confirm the HCI_EVENT_PATCHES_FW_REQ command.  I don't think the FAT has been written yet and occurs later in the code.

    If I try with initDriver(0) in the first location, it starts fine but then the FAT can not be written because it was not booted in the way that allows it to be written and the patch can not be applied.

    I am wondering if there may be version problems also.  Such as mixed versions between what is in the CC3000 (although, this should not matter since it should be booting from ROM and not patch code) and the host driver version.  It may also explain why you are not seeing the problem.  In your post, you mention a "fat_write_content" routine.  That does not even show up in the patch programming code I downloaded from the TI site.  To specify where I am at, I am controlling the CC3000 with an MSP430F5336.  It is running version 1.10.1.  My host driver code is version 1.10.1.  My patch programmer routines were leveraged from 1.11 (although I have also looked at the 1.10.2 version for a comparison).  At what point was the fat_write_content routine introduced?

    Thanks,

    Brent

  • Hi Martin,

    Btw, I cannot open the logic dvdat files. What SW you are using? Regarding the logs from the debug pin, this pin is not the driver log pin but the firmware log pin and thus not so useful. For next time, please use the other pin.

    I built the setup exactly as you do, erasing the EEPROM first to all 0xFF and rerun the test. Bottom line, it is not getting stuck to me. I get on the first init_driver(1) all the 3 requests (driver, bootloader and firmware) and ACK them. Then I get the init done event. So it is hard to see why it is different from what you see. Please note it is very important to ACK every request as in the example code as the CC3000 is waiting for it. So in the init_driver(0) test that you did, you must ACK it.

    Regarding the EEPROM, I can see in the FAT that the FW patch file ID seems to be valid. When I look at the relevant address, I can only see all 0 where the length of the patch should reside. So as long as the length is 0, it should ignore it.

    Let me think of another test you can apply assuming the firmware patch event is the problem.

    Regards,

    Shlomi

  • I'm located in Israel.

    HCI_CMND_READ_BUFFER_SIZE is used in order to get the number of free TX buffers in the device. I guess that for the test you can eliminate it but this is not the problem as it seems you are not getting the init done event. Any command would be stuck as long as you don't get it.

    Shlomi

  • Hi Mario,

    It seems you experience the same issue. Actually, newer patch programmer is the one you are using and is able to overcome corruption in the FAT (by not using the patches).

    I was wandering in your case, can you try the MSP430FR5739 and verify whether you see the same problem. Don't use the binary but step-by-step as you do for the other MSP. You have the complete workspace from the WiKi. I'm asking because this is exactly what I'm doing here and cannot reproduce it. I was wandering if at least we are aligned on a specific working MCU.

    Thanks,

    Shlomi

  • Hi Shlomi,

    the software to view my logic analyzer traces can be downloaded from

    http://www.tech-tools.com/logic-analyzer-downloads.htm

    You can e.g. use the software on top version 7.0.2.

    Have a look at this message, how to use the logic analyzer (as viewer):

    http://e2e.ti.com/support/low_power_rf/f/851/p/282698/986944.aspx#986944

    Shlomi Itzhak said:

    Actually, newer patch programmer is the one you are using

    and is able to overcome corruption in the FAT (by not using the patches).

    Can you display, what is the correct sequence to overcome corruption?

    Sorry, i cannot download anything from TI website, see my other bugreport.

    Once i can download, which version shall i look at?

    My info/sequence is taken from

    PatchProgrammer.c

    from

    C:\ti\PatchProgrammerLM4F232H5QD-4.11.7.13.19\Patch Programmer Source\Source\Patch Programmer

    Is this a obsolete version?

    Best regards,

    Martin

  • Hello Shlomi,

    Shlomi Itzhak said:
    Regarding the logs from the debug pin, this pin is not the driver log pin but the firmware log pin and thus not so useful. For next time, please use the other pin.

    would be nice to get such a info somewhere from webpage...

    Here are the trace from the other debug pin:

    0334.trace-debug2-20130827.zip

    Best regards,

    Martin

  • Martin,

    You are using the right version. There is no sequence to overcome the corruption. Adding the init_driver(1) that loads with no patches is the mechanism that enables to overcome corruptions in the patch files themself.

    Why can't you download from the WiKi the complete package? It is under http://processors.wiki.ti.com/index.php/CC3000_Wi-Fi_Downloads#Patch_Programmer.

    Shlomi

  • Martin,

    The log extraction cannot be shared. It is TI internal. Sorry for that.

    Regarding the logs, I can see the same as I saw before. I could see that using wlan_start(1) ends up with requesting all patches from the host and finally the init done is printed in the log. BUT, I cannot see the read buffer size command so the host must be waiting for the init done event. The print does not indicate that the event eventually leaves the CC3000 so it is hard to know where it is stuck.

    I have few more ideas that requires me to build another setup and test. Tomorrow I'm OoO but on Thursday I can proceed working on it.

    Regards,

    Shlomi 

  • Hi Shlomi,

    thanks for your answer!

    Shlomi Itzhak said:
    Why can't you download from the WiKi the complete package?

    see here

    http://e2e.ti.com/support/low_power_rf/f/851/t/285896.aspx

    Download just don't start (on multiple computer tried). I get a email with a link with the same behaviour. Tried it with latest Firefox 23.0.1 and IE...

    Best regards,

    Martin

  • Hi Shlomi,

    Shlomi Itzhak said:

    I have few more ideas that requires me to build another setup and test. Tomorrow I'm OoO but on Thursday I can proceed working on it.

    many thanks for the info and to let me know that you are OoO.

    Please let me know if i can help, try something or you find something out.

    Best regard,

    Martin

  • Hi Shlomi et all,

    done some new tests: I connected my broken CC3000 module (with the EEPROM, which i used for the last test and uploaded some threads ago) to a MSP430G2 launchpad. I flashed pre-compiled software from

    C:\ti\CC3000SDK\CC3000 SDK\MSP430G2553\Basic WiFi Application\tools\Binary

    It has a date of 06.05.2013 - 07:19 (which i think is a date where TI has compiled it).

    It is this "binary":

    @C000
    49 50 3A 25 64 2E 25 64 2E 25 64 2E 25 64 0C 0D
    00 54 54 54 0C 0D 44 4F 4E 45 0C 0D 0C 0D 53 6D
    61 72 74 20 63 6F 6E 66 69 67 20 44 4F 4E 45 0C
    0D 0C 0D 45 78 61 6D 70 6C 65 20 41 70 70 3A 64
    72 69 76 65 72 20 76 65 72 73 69 6F 6E 20 0C 0D
    4E 6F 20 64 61 74 61 20 72 65 63 65 69 76 65 64
    0C 0D 0C 0D 49 6C 6C 65 67 61 6C 20 63 6F 6D 6D
    61 6E 64 0C 0D 
    @C076
    FF FF 00 00 03 00 00 00 00 68 6F 6D 65 5F 61 73
    73 69 73 74 61 6E 74 00 01 30 31 32 33 34 35 36
    37 38 39 00 31 40 00 04 3C 40 24 02 3D 40 59 00
    B0 12 C0 E3 3C 40 00 02 3D 40 76 C0 3E 40 24 00
    B0 12 30 E5 B0 12 82 D2 B0 12 28 E5 0A 12 0B 12
    08 12 09 12 06 12 07 12 04 12 05 12 0D 12 0A 4C
    05 4E 08 43 82 93 26 02 FD 27 1B 42 28 02 EB 92
    00 00 B4 21 1D 43 0C 4B B0 12 2E E3 08 4C 09 4B
    39 50 05 00 06 49 07 4A 0C 4B B0 12 3A C8 0F 4C
    0F DD 0F 93 9D 21 54 4B 03 00 44 44 0F 48 1F 83
    69 24 1F 83 67 24 1F 83 65 24 1F 83 63 24 1F 83
    61 24 1F 83 5F 24 1F 83 0A 25 1F 83 5B 24 1F 83
    59 24 1F 83 57 24 1F 83 55 24 1F 83 53 24 1F 83
    4D 24 3F 80 F4 01 4A 24 1F 83 4C 24 1F 83 46 24
    1F 83 44 24 3F 80 03 00 4E 24 3F 80 FA 0D 42 24
    1F 83 40 24 1F 83 AA 24 1F 83 7F 24 1F 83 63 24
    1F 83 38 24 1F 83 36 24 1F 83 B3 24 1F 83 32 24
    1F 83 D4 24 1F 83 2E 24 2F 83 6F 24 2F 83 96 24
    1F 83 3F 24 1F 83 22 24 3F 80 F0 0F 1F 24 1F 83
    1D 24 1F 83 1B 24 1F 83 19 24 1F 83 FA 24 1F 83
    15 24 2F 83 13 24 1F 83 11 24 3F 80 F7 1F 40 25
    3F 80 0B 00 3D 21 6F 49 4F 4F 82 4F 40 02 1D 43
    0C 49 B0 12 2E E3 82 4C 42 02 32 3D DA 4B 04 00
    00 00 2E 3D 0D 43 0C 49 B0 12 3C DC 8A 4C 00 00
    8A 4D 02 00 25 3D DA 4B 04 00 00 00 1A 53 0D 43
    0C 49 B0 12 3C DC 0E 4C 0F 4D 0C 4A B0 12 9A E2
    17 3D 0D 43 0C 49 B0 12 3C DC 8A 4C 00 00 8A 4D
    02 00 2A 52 2D 42 0C 49 B0 12 3C DC 8A 4C 00 00
    8A 4D 02 00 05 3D 0D 43 0C 49 B0 12 3C DC 8A 4C
    00 00 8A 4D 02 00 2A 52 2D 42 0C 49 B0 12 3C DC
    8A 4C 00 00 8A 4D 02 00 2A 52 3E 40 10 00 39 52
    0D 49 0C 4A B0 12 E4 E3 EB 3C 0D 43 0C 49 B0 12
    3C DC 8A 4C 00 00 8A 4D 02 00 2A 52 2D 42 0C 49
    B0 12 3C DC 8A 4C 00 00 8A 4D 02 00 2A 52 3D 42
    0C 49 B0 12 3C DC 8A 4C 00 00 8A 4D 02 00 BA 90
    C7 FF 04 00 CD 20 BA 93 06 00 CA 20 1E 43 0F 43
    2C 4A 1D 4A 02 00 B0 12 A6 DA C2 3C 0D 43 0C 49
    B0 12 3C DC 8A 4C 00 00 8A 4D 02 00 2A 52 2D 42
    0C 49 B0 12 3C DC 8A 4C 00 00 8A 4D 02 00 2A 52
    AF 3C 0D 43 0C 49 B0 12 3C DC 8A 4C 00 00 8A 4D
    02 00 2A 52 2D 42 0C 49 B0 12 3C DC 8A 4C 00 00
    8A 4D 02 00 2A 52 3D 42 0C 49 B0 12 3C DC 8A 4C
    00 00 8A 4D 02 00 2A 52 3D 40 0C 00 0C 49 B0 12
    3C DC 8A 4C 00 00 8A 4D 02 00 8A 3C DA 4B 04 00
    04 00 2E 42 0D 49 0C 4A B0 12 E4 E3 81 3C 0D 43
    0C 49 B0 12 3C DC 8A 4C 00 00 8A 4D 02 00 2A 52
    2D 42 0C 49 B0 12 3C DC 8A 4C 00 00 8A 4D 02 00
    2A 52 3D 42 0C 49 B0 12 2E E3 0E 4C 0F 43 8A 4E
    00 00 8A 4F 02 00 2A 53 3D 40 0A 00 0C 49 B0 12
    2E E3 0E 4C 0F 43 8A 4E 00 00 8A 4F 02 00 2A 53
    3E 40 26 00 39 50 0C 00 0D 49 0C 4A B0 12 E4 E3
    4F 3C 0F 43 06 3C 0E 46 0E 5F E7 4E 00 00 17 53
    1F 53 2F 92 F8 3B 26 52 0F 43 06 3C 0E 46 0E 5F
    E7 4E 00 00 17 53 1F 53 2F 92 F8 3B 26 52 0F 43
    06 3C 0E 46 0E 5F E7 4E 00 00 17 53 1F 53 2F 92
    F8 3B 26 52 0F 43 06 3C 0E 46 0E 5F E7 4E 00 00
    17 53 1F 53 2F 92 F8 3B 26 52 0F 43 06 3C 0E 46
    0E 5F E7 4E 00 00 17 53 1F 53 2F 92 F8 3B 26 52
    0F 43 06 3C 0E 46 0E 5F E7 4E 00 00 17 53 1F 53
    3F 90 06 00 F7 3B 36 50 06 00 0F 43 06 3C 0E 46
    0E 5F E7 4E 00 00 17 53 1F 53 3F 90 20 00 F7 3B
    18 92 24 02 2E 20 82 43 24 02 2B 3C 09 4B 56 4B
    02 00 3D 40 03 00 0C 4B B0 12 2E E3 04 4C 81 93
    00 00 12 24 2D 42 0C 4B 3C 50 05 00 B0 12 3C DC
    85 4C 00 00 85 4D 02 00 6E 45 4E 4E 0D 4B 3D 50
    15 00 2C 41 B0 12 E4 E3 46 46 04 86 0E 44 46 46
    09 56 39 50 05 00 0D 49 0C 4A B0 12 E4 E3 82 43
    46 02 82 43 26 02 B0 12 D8 CB EB 92 00 00 06 20
    38 90 00 10 03 20 0C 4B B0 12 1E D5 82 93 24 02
    09 22 82 93 46 02 06 22 0C 43 21 53 30 40 1A E4
    0A 12 0B 12 08 12 09 12 06 12 07 12 04 12 05 12
    31 80 28 00 0A 4C 5E 4A 01 00 7E 80 31 00 16 24
    5E 83 17 24 5E 83 27 24 5E 83 89 24 5E 83 54 24
    5E 83 E8 24 5E 83 45 24 5E 83 0B 25 5E 83 65 25
    7E 80 28 00 65 25 5E 83 6D 25 7D 3D B0 12 AC CF
    80 3D 5C 4A 02 00 B0 12 9C DC 4E 4C 0F 43 04 4E
    05 4F 0F 4A 3F 50 03 00 07 4F 0E 44 0F 45 0C 47
    B0 12 4E D4 6E 3D 1F 42 6A 02 1F D2 6C 02 0F 93
    06 24 1F 42 66 02 1F D2 68 02 0F 93 06 20 00 3C
    3F 40 4B 01 3F 53 FE 2F EE 3F 03 12 30 12 11 00
    2E 43 0F 43 2C 43 0D 43 B0 12 52 D8 0E 4C 0F 4E
    3F E3 0F 5F 0F 7F 82 4E 76 02 82 4F 78 02 21 52
    48 3D 1C 42 76 02 1D 42 78 02 B0 12 DC DB B2 43
    76 02 B2 43 78 02 3D 3D 0F 41 3F 50 24 00 0F 12
    03 12 03 12 03 12 30 12 08 00 0F 41 3F 50 1A 00
    3E 40 FF 02 1C 42 76 02 1D 42 78 02 B0 12 68 E0
    0E 4C 0F 4E 3F E3 0F 5F 0F 7F 81 4E 2A 00 81 4F
    2C 00 31 50 0A 00 81 93 22 00 04 38 0A 20 91 93
    20 00 07 2C 3D 40 14 00 3C 40 4E C0 B0 12 82 E3
    10 3D 3D 42 3C 40 FF 02 B0 12 82 E3 0A 3D 0F 4A
    2F 52 06 4F 5D 4A 03 00 5C 4A 02 00 B0 12 1A E2
    0E 4C 0F 43 08 4E 09 4F 09 93 06 28 03 20 38 90
    09 00 02 28 38 42 09 43 0F 46 0F 58 0B 4F 5D 4B
    01 00 6C 4B B0 12 1A E2 81 4C 10 00 5D 4B 03 00
    5C 4B 02 00 B0 12 C2 E2 C1 4C 12 00 5D 4B 05 00
    5C 4B 04 00 B0 12 C2 E2 C1 4C 13 00 5D 4B 07 00
    5C 4B 06 00 B0 12 C2 E2 C1 4C 14 00 5D 4B 09 00
    5C 4B 08 00 B0 12 C2 E2 C1 4C 15 00 5D 4B 0B 00
    5C 4B 0A 00 B0 12 C2 E2 C1 4C 16 00 5D 4B 0D 00
    5C 4B 0C 00 B0 12 C2 E2 C1 4C 17 00 03 12 30 12
    10 00 03 12 03 12 09 12 08 12 0F 41 3F 50 1C 00
    0E 46 1C 42 76 02 1D 42 78 02 B0 12 2E DF 31 50
    0C 00 A7 3C A1 43 10 00 5D 4A 03 00 5C 4A 02 00
    B0 12 C2 E2 C1 4C 12 00 5D 4A 05 00 5C 4A 04 00
    B0 12 C2 E2 C1 4C 13 00 2E 42 0D 43 0C 41 3C 50
    14 00 B0 12 D2 E3 03 12 30 12 10 00 0E 41 3E 50
    14 00 1C 42 76 02 1D 42 78 02 B0 12 C4 D7 21 52
    80 3C F1 43 04 00 F1 43 05 00 F1 43 06 00 C1 43
    07 00 5D 4A 03 00 5C 4A 02 00 B0 12 C2 E2 C1 4C
    0C 00 5D 4A 05 00 5C 4A 04 00 B0 12 C2 E2 C1 4C
    0D 00 5D 4A 07 00 5C 4A 06 00 B0 12 C2 E2 C1 4C
    0E 00 5D 4A 09 00 5C 4A 08 00 B0 12 C2 E2 C1 4C
    0F 00 5D 4A 0B 00 5C 4A 0A 00 B0 12 C2 E2 C1 4C
    08 00 5D 4A 0D 00 5C 4A 0C 00 B0 12 C2 E2 C1 4C
    09 00 5D 4A 0F 00 5C 4A 0E 00 B0 12 C2 E2 C1 4C
    0A 00 5D 4A 11 00 5C 4A 10 00 B0 12 C2 E2 C1 4C
    0B 00 C1 43 00 00 C1 43 01 00 C1 43 02 00 C1 43
    03 00 0F 41 0F 53 0E 41 3E 52 0D 41 2D 52 0C 41
    3C 50 0C 00 B0 12 24 D7 24 3C B0 12 EC E1 21 3C
    03 12 03 12 0E 43 0F 43 0C 43 0D 43 B0 12 C6 D9
    21 52 17 3C 1F 42 6A 02 1F D2 6C 02 0F 93 11 24
    3C 40 09 02 B0 12 08 E4 0E 4C 3D 40 09 02 1C 43
    B0 12 D6 D8 06 3C 3D 40 13 00 3C 40 62 C0 B0 12
    82 E3 3D 42 3C 40 14 C0 B0 12 82 E3 31 50 28 00
    30 40 1A E4 0A 12 0B 12 08 12 09 12 31 80 2A 00
    08 4C 09 43 1D 43 0C 48 B0 12 2E E3 0A 4C 0B 43
    3A B0 00 40 21 28 3A 90 00 41 1E 20 0B 93 1C 20
    0C 48 B0 12 46 DE 1E 42 4C 02 1F 42 4E 02 1A 42
    48 02 1B 42 4A 02 0E 9A 0C 20 0F 9B 0A 20 C2 93
    50 02 07 24 4F 43 0E 43 3C 40 99 00 0D 43 92 12
    32 02 1C 43 0D 43 EA 3C 0A 93 B9 34 0E 4A 0F 4B
    0F 83 B2 20 3E 80 01 80 14 24 1E 83 12 24 2E 83
    10 24 3E 80 0C 00 19 24 3E 80 30 00 62 24 3E 80
    40 00 07 24 3E 80 80 01 04 24 3E 80 00 06 92 24
    9B 3C 82 93 32 02 06 24 4F 43 0E 43 0C 4A 0D 4B
    92 12 32 02 1C 43 0D 43 C1 3C 0F 41 3F 50 14 00
    09 48 39 50 05 00 0E 43 06 3C 0D 49 0D 5E EF 4D
    00 00 1F 53 1E 53 2E 92 F8 3B 29 52 0E 43 06 3C
    0D 49 0D 5E EF 4D 00 00 1F 53 1E 53 2E 92 F8 3B
    29 52 0E 43 06 3C 0D 49 0D 5E EF 4D 00 00 1F 53
    1E 53 2E 92 F8 3B 29 52 0E 43 06 3C 0D 49 0D 5E
    EF 4D 00 00 1F 53 1E 53 2E 92 F8 3B 29 52 0E 43
    06 3C 0D 49 0D 5E EF 4D 00 00 1F 53 1E 53 2E 92
    F8 3B DF 48 04 00 00 00 82 93 32 02 BB 27 7F 40
    15 00 0E 41 3E 50 14 00 0C 4A 0D 4B 92 12 32 02
    B1 3F 38 50 05 00 09 48 0D 43 0C 49 B0 12 3C DC
    81 4C 00 00 81 4D 02 00 2D 42 0C 49 B0 12 3C DC
    81 4C 04 00 81 4D 06 00 3D 42 0C 49 B0 12 3C DC
    81 4C 08 00 81 4D 0A 00 3D 40 0C 00 0C 49 B0 12
    3C DC 81 4C 0C 00 81 4D 0E 00 3D 40 10 00 0C 49
    B0 12 3C DC 81 4C 10 00 81 4D 12 00 82 93 32 02
    81 27 7F 40 14 00 0E 41 0E 53 0C 4A 0D 4B 92 12
    32 02 78 3F 82 93 32 02 75 27 4F 43 0E 43 0C 4A
    0D 4B 92 12 32 02 6E 3F 0C 43 0D 43 2F 3C 3A 90
    03 10 02 20 0B 93 0A 24 3A 90 0F 10 02 20 0B 93
    05 24 3A 90 0E 10 20 20 0B 93 1E 20 0C 48 3C 50
    05 00 2D 42 B0 12 3C DC 3C 90 C7 FF 12 20 3D 93
    10 20 5E 48 04 00 4E 4E 0F 43 82 4E 3C 02 82 4F
    3E 02 38 50 05 00 0C 48 B0 12 84 E1 1C 43 0D 43
    05 3C 0C 43 0D 43 02 3C 0C 43 0D 43 31 50 2A 00
    30 40 22 E4 0A 12 0B 12 0E 43 0F 43 0D 93 15 24
    F2 B2 03 00 FD 2B D2 42 04 02 6F 00 E2 B2 03 00
    FD 2B 0B 4C 0B 5E DB 42 6E 00 00 00 1E 53 0F 63
    0F 93 EE 3B 02 20 0E 9D EB 2B 3B 41 3A 41 30 41
    0A 12 1A 42 5E 02 5E 4A 05 00 6E 83 03 24 6E 83
    15 24 27 3C 3D 40 03 00 0C 4A 3C 50 05 00 B0 12
    2E E3 0E 4C 0F 43 1C B3 02 2C 1E 53 0F 63 0D 4E
    0D DF 0D 93 16 24 B0 12 20 CB 13 3C 5E 4A 08 00
    0F 43 3E 53 3F 63 1E B3 02 28 1E 53 0F 63 0D 4E
    0D DF 0D 93 02 24 B0 12 20 CB B2 42 58 02 82 43
    5A 02 0C 43 0D 43 3A 41 30 41 0D 4E 3A 50 0A 00
    0C 4A 30 40 7A CA B0 12 B6 CA 0F 4C 0F DD 0F 93
    02 20 B0 12 70 E2 30 41 0D 93 0D 24 F2 B2 03 00
    FD 2B E2 4C 6F 00 E2 B2 03 00 FD 2B C2 93 6E 00
    1C 53 3D 53 F3 23 30 41 3D 40 0A 00 1C 42 5E 02
    30 40 7A CA 0D 12 0C 12 0F 12 0E 12 5F 42 2B 00
    0F 93 2A 24 F2 C0 40 00 2B 00 1E 42 58 02 1F 42
    5A 02 0D 4E 0D DF 0D 93 05 20 92 43 58 02 82 43
    5A 02 1A 3C 2E 93 13 20 0F 93 11 20 B2 40 06 00
    58 02 82 43 5A 02 F2 C0 80 00 29 00 B0 12 5E CB
    B2 42 58 02 82 43 5A 02 B0 12 2C CB 05 3C 3E 90
    03 00 02 20 B0 12 F6 E3 3E 41 3F 41 3C 41 3D 41
    00 13 F2 D0 40 00 2D 00 30 41 0F 4C 0E 4D F2 C0
    80 00 29 00 03 43 3D 40 8E 01 3D 53 FE 2F 2D 42
    0C 4F B0 12 3E CB 03 43 3D 40 8E 01 3D 53 FE 2F
    2E 82 0D 4E 2F 52 0C 4F B0 12 AC E3 0C 43 0D 43
    30 41 0A 12 0B 12 0B 4C 0A 4D 4F 43 1D B3 01 2C
    5F 43 DC 43 00 00 0E 4D 0E 5F 8E 10 CC 4E 01 00
    4E 4D 4E 5F CC 4E 02 00 CC 43 03 00 CC 43 04 00
    3F 50 05 00 0A 5F F2 90 DE 00 E3 02 01 24 FF 3F
    1F 42 58 02 1F D2 5A 02 0F 93 01 20 FF 3F 92 93
    58 02 07 20 82 93 5A 02 04 20 0D 4A B0 12 E0 CB
    18 3C 92 12 38 02 B0 12 98 E4 B2 40 03 00 58 02
    82 43 5A 02 82 4B 5C 02 82 4A 54 02 F2 C0 80 00
    29 00 92 12 36 02 92 12 34 02 0F 4C 0F DD B0 12
    F6 E3 B0 12 98 E4 0C 43 0D 43 FF 3E 0A 12 0B 12
    08 12 09 12 06 12 07 12 04 12 05 12 0D 12 0C 12
    0E 12 0F 12 31 80 12 00 1C 41 16 00 B0 12 96 DE
    0C 93 AE 20 92 53 48 02 82 63 4A 02 17 42 2A 02
    0C 47 3C 50 0A 00 1A 41 2C 00 1B 41 2E 00 14 41
    34 00 15 41 36 00 18 41 38 00 19 41 3A 00 0E 48
    0F 49 0F 83 20 20 3E 80 81 00 13 24 2E 83 1B 20
    0E 4A 0F 4B 3E 52 0F 63 81 4E 02 00 81 4F 04 00
    F1 42 01 00 F1 40 18 00 00 00 06 47 36 50 22 00
    0A 3C 04 43 05 43 81 43 12 00 F1 40 10 00 00 00
    06 47 36 50 1A 00 1E 41 16 00 1F 41 18 00 B0 12
    9A E2 6E 41 4E 4E 3E 50 FC FF 0F 43 B0 12 9A E2
    0E 4A 0F 4B B0 12 9A E2 1E 41 30 00 1F 41 32 00
    B0 12 9A E2 38 90 83 00 0E 20 09 93 0C 20 1E 41
    02 00 1F 41 04 00 B0 12 9A E2 5E 41 01 00 4E 4E
    0F 43 B0 12 9A E2 0E 43 07 3C 1F 41 14 00 0F 5E
    E6 4F 00 00 16 53 1E 53 0F 4E 3F E3 0F 5F 0F 7F
    0F 9B F3 3B 02 20 0E 9A F0 2B 38 90 83 00 14 20
    09 93 12 20 0E 43 07 3C 1F 41 12 00 0F 5E E6 4F
    00 00 16 53 1E 53 0F 4E 3F E3 0F 5F 0F 7F 0F 95
    F3 3B 02 20 0E 94 F0 2B 04 12 11 12 16 00 0F 4A
    5E 41 04 00 4E 4E 0D 47 0C 12 C1 48 00 00 3C 41
    B0 12 50 DD 21 52 38 90 83 00 0A 20 09 93 08 20
    0D 41 3D 50 06 00 3C 40 0F 10 B0 12 6C E4 07 3C
    0D 41 3D 50 06 00 3C 40 03 10 B0 12 6C E4 0C 4A
    31 50 1A 00 30 40 1A E4 0A 12 0B 12 08 12 09 12
    06 12 07 12 31 80 10 00 0B 4C 0A 4D 09 4E 08 4F
    04 3C 7D 49 0C 4A 8B 12 0A 4C 6E 49 4E 93 05 20
    0C 43 31 50 10 00 30 40 1E E4 7E 90 25 00 F1 23
    19 53 76 49 4E 46 7E 80 25 00 92 24 7E 80 33 00
    75 24 7E 80 0B 00 13 24 5E 83 17 24 7E 80 05 00
    14 24 7E 80 06 00 6A 24 5E 83 6B 24 7E 80 03 00
    6D 24 6E 83 63 24 7E 80 03 00 60 24 D6 3F 2F 48
    6D 4F 2F 53 88 4F 00 00 CD 3F B0 12 8A E4 81 93
    00 00 05 34 7D 40 2D 00 0C 4A 8B 12 0A 4C 76 90
    6F 00 03 20 B1 42 04 00 0D 3C 4E 46 7E D0 20 00
    7E 90 78 00 03 20 3F 40 10 00 02 3C 3F 40 0A 00
    81 4F 04 00 B1 40 06 00 02 00 27 41 76 90 64 00
    04 20 07 93 02 34 37 E3 17 53 1F 41 02 00 3F 53
    81 4F 08 00 81 4F 02 00 B0 12 0E E5 7E 50 30 00
    7E 90 3A 00 04 28 4F 46 7F 50 AF 00 4E 5F 0F 41
    3F 50 0A 00 1F 51 08 00 81 4F 06 00 CF 4E 00 00
    B0 12 0E E5 07 4C 0C 93 03 24 91 93 02 00 DD 37
    37 40 06 00 17 81 02 00 16 41 06 00 0C 4A 03 3C
    7D 46 8B 12 37 53 07 93 FB 23 76 3F B0 12 8A E4
    AE 3F B0 12 8A E4 76 40 78 00 A9 3F 2F 48 27 4F
    2F 53 88 4F 00 00 0C 47 B0 12 08 E4 06 4C 05 3C
    7D 47 0C 4A 8B 12 0A 4C 36 53 06 93 F9 23 5D 3F
    7D 40 25 00 57 3F 82 43 62 02 82 43 64 02 82 43
    66 02 82 43 68 02 82 43 6A 02 82 43 6C 02 82 43
    6E 02 82 43 70 02 03 12 03 12 0E 43 0F 43 0C 43
    0D 43 B0 12 C6 D9 3C 40 FF 00 0D 43 B0 12 E4 DE
    21 52 92 93 66 02 09 20 82 93 68 02 06 20 00 3C
    3F 40 4B 01 3F 53 FE 2F F4 3F 7C 40 06 00 B0 12
    34 E5 3C 40 11 C0 B0 12 38 DA 7C 40 06 00 B0 12
    38 E5 0C 43 0D 43 B0 12 F4 DD 7C 40 06 00 B0 12
    34 E5 1F 42 62 02 1F D2 64 02 0F 93 17 20 3F 40
    5E E3 3E 40 16 00 3F 53 3E 63 FD 2F 7C 40 06 00
    B0 12 38 E5 3F 40 5E E3 3E 40 16 00 3F 53 3E 63
    FD 2F 7C 40 06 00 B0 12 34 E5 E3 3F 7C 40 06 00
    B0 12 34 E5 03 12 13 12 0E 43 0F 43 0C 43 0D 43
    B0 12 C6 D9 B0 12 0E E3 3F 40 5E E3 3E 40 16 00
    3F 53 3E 63 FD 2F 3D 40 15 00 3C 40 1C C0 B0 12
    82 E3 0C 43 B0 12 D8 D5 3C 40 44 82 0D 43 B0 12
    50 D9 21 52 30 41 0A 12 0B 12 31 80 32 00 B0 12
    FC DC B0 12 A2 E0 B0 12 70 DF 30 12 3C E4 30 12
    18 E5 30 12 4C E4 30 12 DE E4 3F 40 C2 E4 3E 40
    A6 E4 3D 40 7C E4 3C 40 6A D3 B0 12 B0 DF 0C 43
    B0 12 D8 D5 7C 40 05 00 B0 12 34 E5 3C 40 44 82
    0D 43 B0 12 50 D9 3D 40 1D 00 3C 40 31 C0 B0 12
    82 E3 0F 41 3F 52 0A 4F 0D 4A 6C 43 B0 12 10 DB
    0B 4C 0A 5B FA 40 2E 00 00 00 1A 53 0D 4A 7C 40
    0D 00 B0 12 10 DB 0B 4C 0A 5B FA 40 2E 00 00 00
    1A 53 0D 4A 7C 40 07 00 B0 12 10 DB 0B 4C 0A 5B
    FA 40 2E 00 00 00 1A 53 0D 4A 7C 40 0D 00 B0 12
    10 DB 0B 4C 0A 5B FA 40 0C 00 00 00 1A 53 FA 40
    0D 00 00 00 1A 53 CA 43 00 00 1A 53 0C 41 3C 52
    B0 12 08 E4 0D 4C 0C 41 3C 52 B0 12 82 E3 B0 12
    EA E2 C2 43 7C 02 0C 43 31 50 3A 00 3B 41 3A 41
    30 41 0A 12 0B 12 08 12 09 12 06 12 07 12 06 4D
    0A 4E 0B 4F 08 46 38 50 05 00 09 46 39 50 05 00
    F9 40 03 00 00 00 19 53 C9 4C 00 00 19 53 0D 4B
    2D 53 0C 49 B0 12 98 E3 09 4C 3B 90 E9 03 18 2C
    0D 4B 0C 49 B0 12 98 E3 0D 4B 0C 49 B0 12 98 E3
    09 4C 0E 4B 0D 4A 0C 46 3C 50 0B 00 B0 12 E4 E3
    3B 50 06 00 0D 4B 0C 46 B0 12 18 CC 30 40 1E E4
    0C 4B 3E 40 E8 03 B0 12 6A E3 07 4C 07 57 0D 4B
    0D 57 2D 53 0C 49 B0 12 98 E3 3D 40 E8 03 0C 49
    B0 12 98 E3 09 4C 3E 40 E8 03 0D 4A 0C 46 3C 50
    0B 00 B0 12 E4 E3 3B 50 18 FC 3A 50 E8 03 3D 40
    EE 03 0C 46 B0 12 18 CC 11 3C 37 40 E8 03 0B 87
    88 47 00 00 0E 47 0D 4A 0C 48 2C 53 B0 12 E4 E3
    0A 57 27 53 0D 47 0C 48 B0 12 18 CC 0B 93 C6 27
    3B 90 E9 03 EA 2F 07 4B 0B 43 EA 3F 0A 12 82 43
    6A 02 82 43 6C 02 82 43 66 02 82 43 68 02 82 43
    76 02 82 43 78 02 82 43 62 02 82 43 64 02 B2 40
    80 5A 20 01 B0 12 AC D0 3E 40 1A 00 3D 40 FF 00
    3C 40 E4 02 B0 12 D2 E3 82 43 60 02 32 D0 98 00
    03 43 82 93 60 02 12 24 B0 12 B4 E4 3C 40 E4 02
    B0 12 D6 C4 82 43 60 02 3E 40 1A 00 3D 40 FF 00
    3C 40 E4 02 B0 12 D2 E3 B0 12 EA E2 D2 93 7C 02
    1E 20 92 93 6A 02 1B 20 82 93 6C 02 18 20 92 93
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    0C 2C 3C 40 09 02 B0 12 08 E4 0E 4C 3D 40 09 02
    1C 43 B0 12 D6 D8 5A 53 F1 3F C2 43 7C 02 92 93
    6A 02 C4 23 82 93 6C 02 C1 23 92 93 66 02 BE 23
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    62 02 82 43 64 02 D2 43 7C 02 3A 90 01 80 0A 20
    0B 93 08 20 92 43 66 02 82 43 68 02 7C 40 07 00
    B0 12 34 E5 3A 90 02 80 17 20 0B 93 15 20 82 43
    66 02 82 43 68 02 82 43 6A 02 82 43 6C 02 82 43
    72 02 82 43 74 02 D2 43 18 02 7C 40 07 00 B0 12
    38 E5 7C 42 B0 12 38 E5 3A 90 10 80 2A 20 0B 93
    28 20 C9 93 14 00 1E 20 6F 49 4F 4F 0F 12 5F 49
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    31 52 07 3C 82 43 6A 02 82 43 6C 02 7C 42 B0 12
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    82 43 70 02 30 40 22 E4 0A 12 0B 12 08 12 09 12
    31 80 0A 00 09 4C 0A 4E 0B 4F 0C 41 2C 52 3E 40
    06 00 B0 12 2C E4 B1 43 00 00 B1 43 02 00 18 42
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    9A E2 0E 4A 0F 4B B0 12 9A E2 0E 43 0F 43 B0 12
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    0C 41 0C 53 92 12 30 02 0C 93 09 24 2F 41 0E 4C
    1D 42 2A 02 7C 40 03 00 B0 12 98 D1 08 3C 0F 43
    0E 43 1D 42 2A 02 7C 40 03 00 B0 12 98 D1 21 52
    30 41 0A 12 0B 12 08 12 08 4C 82 43 48 02 82 43
    4A 02 82 43 4C 02 82 43 4E 02 82 43 24 02 82 43
    40 02 82 43 42 02 82 43 44 02 82 43 46 02 82 43
    3C 02 82 43 3E 02 82 43 26 02 82 43 28 02 B2 40
    A9 02 2A 02 3C 40 EC E4 B0 12 A2 DD 92 12 34 02
    0A 4C 0B 4D 5C 43 92 12 3A 02 0F 4A 0F DB 0F 93
    07 24 92 12 34 02 0F 4C 0F DD 0F 93 FA 23 0C 3C
    92 12 34 02 0F 4C 0F DD 0F 93 FA 27 92 12 34 02
    0F 4C 0F DD 0F 93 FA 23 0C 48 B0 12 BA E1 4E 43
    1D 42 2A 02 3C 40 0B 40 B0 12 4E E1 0D 43 3C 40
    0B 40 B0 12 6C E4 30 40 24 E4 0A 12 0B 12 08 12
    09 12 06 12 07 12 04 12 05 12 0E 12 31 80 0C 00
    05 4F 16 41 20 00 17 41 22 00 1A 41 24 00 1B 41
    26 00 14 41 28 00 19 42 2A 02 08 49 38 50 09 00
    0E 4C 0F 4D 0C 48 B0 12 9A E2 08 4C 0E 46 0F 47
    0C 48 B0 12 9A E2 08 4C 0E 4A 0F 4B 0C 48 B0 12
    9A E2 08 4C 1A 41 2A 00 1B 41 2C 00 7E 40 0C 00
    0D 49 0C 4A B0 12 4E E1 0D 41 0D 53 0C 4A B0 12
    6C E4 81 93 06 00 0A 38 03 20 91 93 04 00 06 28
    0E 44 0D 45 1C 41 0C 00 B0 12 20 E5 92 41 04 00
    7A 02 1C 41 04 00 31 50 0E 00 30 40 1A E4 0A 12
    0B 12 08 12 09 12 21 83 0A 4C 08 4F F1 43 00 00
    1B 42 2A 02 0C 4B 3C 50 09 00 0F 43 06 3C 09 4A
    09 5F EC 49 00 00 1C 53 1F 53 2F 92 F8 3B 0F 43
    06 3C 0A 4D 0A 5F EC 4A 00 00 1C 53 1F 53 2F 92
    F8 3B 0F 43 06 3C 0D 4E 0D 5F EC 4D 00 00 1C 53
    1F 53 2F 92 F8 3B 0E 43 0F 43 B0 12 9A E2 0F 43
    06 3C 0E 48 0E 5F EC 4E 00 00 1C 53 1F 53 2F 92
    F8 3B 7E 40 14 00 0D 4B 3C 40 01 20 B0 12 4E E1
    0D 41 0D 53 3C 40 01 20 B0 12 6C E4 6C 41 8C 11
    0D 4C 3D E3 0D 5D 0D 7D 21 53 30 40 22 E4 0A 12
    0B 12 08 12 09 12 06 12 07 12 21 82 08 4C 09 4D
    07 4E B1 43 00 00 B1 43 02 00 16 42 2A 02 0C 46
    3C 50 09 00 3A 42 0B 43 0E 48 0F 49 B0 12 9A E2
    3E 42 0F 43 B0 12 9A E2 0E 4A 0F 4B B0 12 9A E2
    0E 43 06 3C 0F 47 0F 5E EC 4F 00 00 1C 53 1E 53
    0F 4E 3F E3 0F 5F 0F 7F 0F 9B F4 3B 02 20 0E 9A
    F1 2B 7E 40 14 00 0D 46 3C 40 02 10 B0 12 4E E1
    0D 41 0D 53 3C 40 02 10 B0 12 6C E4 A2 41 7A 02
    2C 41 1D 41 02 00 21 52 30 40 1E E4 0A 12 0B 12
    08 12 09 12 06 12 07 12 21 82 06 4E 07 4F 1A 41
    12 00 1B 41 14 00 B1 43 00 00 B1 43 02 00 19 42
    2A 02 08 49 38 50 09 00 0E 4C 0F 4D 0C 48 B0 12
    9A E2 08 4C 0E 46 0F 47 0C 48 B0 12 9A E2 08 4C
    0E 4A 0F 4B 0C 48 B0 12 9A E2 08 4C 7E 40 0C 00
    0D 49 3C 40 01 10 B0 12 4E E1 0D 41 0D 53 3C 40
    01 10 B0 12 6C E4 A2 41 7A 02 0E 43 0F 43 2C 41
    1D 41 02 00 B0 12 A6 DA 2C 41 21 52 30 40 1E E4
    0A 12 0B 12 08 12 09 12 21 83 0A 4C 09 4D 0B 4E
    3B 90 21 00 02 28 3C 43 2D 3C 18 42 2A 02 0C 48
    3C 50 09 00 0E 4A 0F 43 B0 12 9A E2 3E 42 0F 43
    B0 12 9A E2 0E 4B 0F 43 B0 12 9A E2 0F 43 06 3C
    0E 49 0E 5F EC 4E 00 00 1C 53 1F 53 0F 9B F8 2B
    0E 12 C1 4B 00 00 3E 41 7E 50 0C 00 0D 48 3C 40
    11 10 B0 12 4E E1 0D 41 0D 53 3C 40 11 10 B0 12
    6C E4 2C 41 21 53 30 40 22 E4 0A 12 0B 12 21 82
    0E 4C 0F 4D 0B 4E 3B F0 08 80 3B 90 08 80 10 20
    C2 43 50 02 3E 90 08 80 05 20 0F 93 03 20 0C 43
    0D 43 22 3C 3E F0 F7 7F 0F F3 3E D0 00 80 02 3C
    D2 43 50 02 B1 43 00 00 B1 43 02 00 1A 42 2A 02
    0B 4A 3B 50 09 00 0C 4B B0 12 9A E2 0B 4C 6E 42
    0D 4A 3C 42 B0 12 4E E1 0D 41 0D 53 3C 42 B0 12
    6C E4 2C 41 1D 41 02 00 21 52 3B 41 3A 41 30 41
    0A 12 0B 12 08 12 09 12 06 12 07 12 21 82 06 4E
    07 4F 1A 41 12 00 1B 41 14 00 B1 43 00 00 B1 43
    02 00 19 42 2A 02 08 49 38 50 09 00 0E 4C 0F 4D
    0C 48 B0 12 9A E2 08 4C 0E 46 0F 47 0C 48 B0 12
    9A E2 08 4C 0E 4A 0F 4B 0C 48 B0 12 9A E2 08 4C
    7E 40 0C 00 0D 49 2C 42 B0 12 4E E1 0D 41 0D 53
    2C 42 B0 12 6C E4 2C 41 1D 41 02 00 21 52 30 40
    1E E4 0A 12 21 82 B1 43 00 00 B1 43 02 00 1D 42
    2A 02 0F 4D 3F 50 09 00 0C 93 04 20 2C 41 1D 41
    02 00 23 3C FC 40 54 00 00 00 FC 40 54 00 01 00
    FC 40 54 00 02 00 0E 43 06 3C 0A 4C 0A 5E EF 4A
    00 00 1F 53 1E 53 3E 90 03 00 F7 3B 7E 40 03 00
    3C 40 0C 00 B0 12 4E E1 0D 41 0D 53 3C 40 0C 00
    B0 12 6C E4 2C 41 1D 41 02 00 21 52 3A 41 30 41
    0A 12 0B 12 08 12 09 12 0A 4C 0B 4D 08 4E 09 4F
    0E 4A 0F 4B 0F 93 03 28 26 20 3E 92 24 2C 0F 48
    0F D9 0F 93 04 24 18 93 1E 20 09 93 1C 20 1C 43
    0E 12 C1 4A 00 00 3E 41 B0 12 F8 E4 3C E3 0D 4C
    3D E3 0D 5D 0D 7D 82 FC 00 02 82 FD 02 02 0C 48
    0D 49 0E 12 C1 4A 00 00 3E 41 B0 12 4A E3 82 DC
    00 02 82 DD 02 02 30 40 22 E4 0A 12 0B 12 08 12
    09 12 06 12 4B 4C 08 4D 46 4B 4B 93 06 20 1A 43
    F8 40 30 00 00 00 0C 4A 23 3C 0A 43 56 93 08 28
    4C 46 7E 40 0A 00 B0 12 66 E3 46 4C 1A 53 F6 3F
    46 4B 0F 48 0F 5A 09 4F 56 93 11 28 39 53 4C 46
    7E 40 0A 00 B0 12 66 E3 4E 4E D9 4E 19 02 00 00
    4C 46 7E 40 0A 00 B0 12 66 E3 46 4C ED 3F 0C 4A
    30 40 20 E4 0A 12 0D 12 0C 12 0F 12 0E 12 7A 40
    FE 00 5A 42 66 00 F2 90 1A 00 FE 02 06 2C 5F 42
    FE 02 4F 4F CF 4A E4 02 0A 3C 3E 40 1A 00 0D 43
    3C 40 E4 02 B0 12 D2 E3 F2 40 FE 00 E5 02 7A 90
    0D 00 09 20 C2 43 FE 02 92 43 60 02 B1 C0 D0 00
    0A 00 03 43 02 3C D2 53 FE 02 3E 41 3F 41 3C 41
    3D 41 3A 41 00 13 0A 12 0B 12 08 12 09 12 21 82
    0A 4C 0B 4D B1 43 00 00 B1 43 02 00 19 42 2A 02
    08 49 38 50 09 00 0E 4A 0F 4B 0C 48 B0 12 9A E2
    08 4C 6E 42 0D 49 3C 40 0B 10 B0 12 4E E1 0D 41
    0D 53 3C 40 0B 10 B0 12 6C E4 A2 41 7A 02 1E 43
    0F 43 0C 4A 0D 4B B0 12 A6 DA 2C 41 1D 41 02 00
    21 52 30 40 22 E4 0A 12 0B 12 0F 4C 0E 4D 0B 4F
    0B 5E 5C 4B 03 00 4C 4C 0D 43 3C F0 FF 00 8C 10
    0D 4C 0C 43 0B 4F 0B 5E 5A 4B 02 00 4A 4A 0B 43
    0B 4A 0A 43 0C 5A 0D 6B 0B 4F 0B 5E 5A 4B 01 00
    4A 4A 0B 43 4B EA 0B EA 8B 10 3A F0 FF 00 8A 10
    0C 5A 0D 6B 0F 5E 6E 4F 4E 4E 0F 43 0C 5E 0D 6F
    3B 41 3A 41 30 41 4E 4C 7E 90 30 00 08 28 7E 90
    3A 00 05 2C 4F 4E 7F 50 D0 00 4C 4F 30 41 7E 90
    61 00 03 20 7C 40 0A 00 30 41 7E 90 62 00 03 20
    7C 40 0B 00 30 41 7E 90 63 00 03 20 7C 40 0C 00
    30 41 7E 90 64 00 03 20 7C 40 0D 00 30 41 7E 90
    65 00 03 20 7C 40 0E 00 30 41 7E 90 66 00 02 20
    7C 40 0F 00 30 41 B0 12 46 E2 B0 12 DC E0 D2 C3
    21 00 D2 D3 22 00 D2 C3 41 00 D2 C3 26 00 F2 C0
    40 00 2A 00 F2 C0 40 00 42 00 F2 C0 40 00 2E 00
    F2 D0 80 00 29 00 F2 D0 80 00 2A 00 F2 C0 80 00
    42 00 F2 C0 80 00 2E 00 3F 40 BE C6 3E 40 2D 00
    3F 53 3E 63 FD 2F 30 40 36 E5 0A 12 0B 12 08 12
    09 12 06 12 08 4D 0A 4E 09 4F 0B 48 3B 50 05 00
    EB 43 00 00 1B 53 CB 4C 00 00 1B 53 CB 4A 00 00
    1B 53 16 41 0E 00 0D 4A 0D 59 0D 56 0C 4B B0 12
    98 E3 0B 4C 0A 59 0A 56 3A 50 05 00 0D 4A 0C 48
    B0 12 18 CC 0C 43 0D 43 30 40 20 E4 0A 12 0A 4C
    82 43 58 02 82 43 5A 02 3E 40 2C 00 0D 43 3C 40
    7D 02 B0 12 D2 E3 3E 40 2C 00 0D 43 3C 40 A9 02
    B0 12 D2 E3 82 4A 52 02 82 43 54 02 82 43 5C 02
    B2 40 7D 02 5E 02 82 43 56 02 F2 40 DE 00 A8 02
    F2 40 DE 00 E3 02 92 12 36 02 3A 41 30 41 0A 12
    0B 12 21 82 0E 4C 0F 4D B1 43 00 00 B1 43 02 00
    1A 42 2A 02 0B 4A 3B 50 09 00 0C 4B B0 12 9A E2
    0B 4C B1 43 00 00 B1 43 02 00 6E 42 0D 4A 3C 40
    0A 00 B0 12 4E E1 0D 41 0D 53 3C 40 0A 00 B0 12
    6C E4 2C 41 1D 41 02 00 21 52 3B 41 3A 41 30 41
    0A 12 0B 12 08 12 09 12 06 12 08 4C 06 43 3D 40
    05 00 0C 48 B0 12 2E E3 06 4C 38 50 07 00 0A 43
    0B 43 09 43 09 3C 2D 43 0C 48 B0 12 2E E3 0D 43
    0A 5C 0B 6D 28 52 19 53 09 96 F5 2B 82 5A 40 02
    82 5A 4C 02 82 6B 4E 02 0C 43 0D 43 30 40 20 E4
    0A 12 0A 4C 1F 42 3C 02 1F D2 3E 02 0F 93 0A 24
    92 42 3C 02 7A 02 82 43 3C 02 82 43 3E 02 1C 42
    7A 02 13 3C 0C 4A 0D 4C 3D E3 0D 5D 0D 7D B0 12
    F0 DF 0F 4C 0F DD 0F 93 02 24 3C 43 06 3C 82 93
    40 02 E0 27 B2 53 40 02 0C 43 3A 41 30 41 0A 12
    0B 12 21 82 0E 4C 0F 4D 1A 42 2A 02 0B 4A 3B 50
    09 00 0C 4B B0 12 9A E2 0B 4C B1 43 00 00 B1 43
    02 00 6E 42 0D 4A 3C 40 06 00 B0 12 4E E1 0D 41
    0D 53 3C 40 06 00 B0 12 6C E4 2C 41 1D 41 02 00
    21 52 3B 41 3A 41 30 41 0A 12 0B 12 08 12 09 12
    06 12 07 12 1A 41 0E 00 1B 41 10 00 18 41 12 00
    19 41 14 00 16 41 16 00 17 41 18 00 03 12 30 12
    83 00 07 12 06 12 09 12 08 12 0B 12 0A 12 B0 12
    B2 CC 31 50 10 00 30 40 1E E4 F2 D0 06 00 26 00
    F2 D0 06 00 41 00 D2 D3 61 00 F2 D0 80 00 61 00
    F2 40 82 00 62 00 F2 40 06 00 63 00 C2 43 64 00
    D2 C3 61 00 D2 D3 01 00 C2 43 FE 02 3E 40 1A 00
    0D 43 3C 40 E4 02 30 40 D2 E3 0A 12 0B 12 08 12
    09 12 1A 41 0A 00 1B 41 0C 00 18 41 0E 00 19 41
    10 00 82 4D 2C 02 82 4E 2E 02 82 4F 30 02 82 4A
    34 02 82 4B 36 02 82 48 38 02 82 49 3A 02 82 4C
    32 02 D2 43 50 02 30 40 22 E4 0E 4C 0F 4D 0C 4E
    0D 4F 0D 93 03 28 15 20 3C 92 13 2C 1C 43 B0 12
    F8 E4 0D 4C 3D E3 0D 5D 0D 7D 82 BC 00 02 03 20
    82 BD 02 02 03 24 1C 43 0D 43 30 41 0C 43 0D 43
    30 41 1C 43 0D 43 30 41 0A 12 0B 12 0A 43 0B 43
    82 93 26 02 11 24 1C 42 28 02 EC 92 00 00 0C 20
    B0 12 3A C8 1C 93 08 20 0D 93 06 20 82 43 26 02
    1A 43 0B 43 B0 12 D8 CB 0C 4A 0D 4B 3B 41 3A 41
    30 41 0A 12 0B 12 08 12 09 12 06 12 1A 41 0C 00
    1B 41 0E 00 18 41 10 00 19 41 12 00 16 41 14 00
    03 12 30 12 0D 10 06 12 09 12 08 12 0B 12 0A 12
    B0 12 80 D6 31 50 0E 00 30 40 20 E4 F2 D0 C0 00
    41 00 F2 D0 C0 00 26 00 F2 D0 20 00 41 00 F2 D0
    20 00 26 00 D2 D3 69 00 F2 D0 29 00 68 00 F2 D0
    80 00 69 00 F2 40 10 00 6A 00 C2 43 6B 00 D2 C3
    69 00 0C 43 30 41 F2 D2 21 00 F2 C2 22 00 F2 D2
    27 00 F2 D2 24 00 C2 43 23 00 F2 D2 25 00 F2 D2
    1A 00 F2 D2 19 00 D2 C3 2A 00 D2 C3 29 00 D2 D3
    2F 00 D2 C3 2C 00 D2 C3 2B 00 D2 D3 2D 00 30 41
    0A 12 21 82 0A 4C 0F 41 3F 52 81 4F 02 00 81 4C
    00 00 3F 50 FA FF 0E 4D 0D 41 0D 53 3C 40 5C E4
    B0 12 3E CE 2F 41 CF 43 00 00 0C 93 02 38 2C 41
    0C 8A 21 52 3A 41 30 41 0A 12 0B 12 08 12 0B 4D
    4A 4E 08 4B 38 50 05 00 D8 43 00 00 18 53 0D 4C
    0C 48 B0 12 98 E3 08 4C C8 4A 00 00 18 53 4D 4A
    2D 52 0C 4B B0 12 18 CC 0C 43 30 40 24 E4 0A 12
    0B 12 08 12 08 4C 0D 43 0C 48 B0 12 3C DC 0A 4C
    0B 4D 2D 42 0C 48 B0 12 3C DC 3C 90 C7 FF 08 20
    3D 93 06 20 1E 43 0F 43 0C 4A 0D 4B B0 12 A6 DA
    30 40 24 E4 1D 42 2A 02 0F 4D 3F 50 09 00 0E 4F
    0F 4E 1F 53 0C 93 02 24 5F 43 01 3C 4F 43 CE 4F
    00 00 5E 43 3C 40 00 40 B0 12 4E E1 0D 43 3C 40
    00 40 30 40 6C E4 21 82 B1 43 00 00 B1 43 02 00
    1D 42 2A 02 4E 43 2C 43 B0 12 4E E1 0D 41 0D 53
    2C 43 B0 12 6C E4 A2 41 7A 02 2C 41 1D 41 02 00
    21 52 30 41 0A 12 0B 12 08 12 4B 4C 4C 4B B0 12
    9C DC 4A 4C 4C 4D B0 12 9C DC 4C 4C 4A 4A 0A 5A
    0A 5A 0A 5A 0A 5A 0A DC 08 4A 0C 48 30 40 24 E4
    D2 42 F9 10 57 00 D2 42 F8 10 56 00 C2 43 53 00
    F2 D0 20 00 53 00 B2 40 AB A5 2A 01 F2 D0 10 00
    26 00 F2 D0 10 00 22 00 30 41 F2 C0 40 00 2D 00
    F2 D0 80 00 29 00 1C 42 5E 02 FC 90 DE 00 2B 00
    01 24 FF 3F A2 43 58 02 82 43 5A 02 3C 50 05 00
    10 42 52 02 CC 4E 00 00 1C 53 0D 4E 8D 10 3D F0
    FF 00 CC 4D 00 00 1C 53 CC 4F 00 00 1C 53 8F 10
    4E 4F 0F 43 CC 4E 00 00 1C 53 30 41 0A 12 0B 12
    08 12 4A 4C 4C 4A B0 12 9C DC 48 4C 4C 4D B0 12
    9C DC 48 58 48 58 48 58 48 58 48 DC 4B 48 4C 4B
    30 40 24 E4 B2 C0 10 00 82 01 92 42 80 01 80 01
    A2 D2 80 01 B2 D0 D0 01 80 01 B2 40 5D 00 92 01
    B2 D0 10 00 82 01 30 41 4C 43 92 12 3A 02 92 12
    34 02 0F 4C 0F DD 0F 93 FA 27 82 93 2A 02 02 24
    82 43 2A 02 30 40 D0 E4 0F 4C 0F 5D 5F 4F 01 00
    4F 4F 3F F0 FF 00 8F 10 0C 5D 6E 4C 4E 4E 0F 5E
    0C 4F 30 41 7E 90 10 00 04 28 0D 4C 0C 43 7E 80
    10 00 4E 93 04 24 0C 5C 0D 6D 5E 83 FC 23 30 41
    7C F3 7E F3 0F 4E 0D 4C 0E 43 1C 43 0D 5D 0E 6E
    0E 9F 01 28 0E 8F 0C 6C F9 2B 30 41 07 3C E2 B3
    03 00 FD 2B E2 4C 67 00 3D 53 1C 53 0D 93 F7 23
    30 41 CC 4D 00 00 1C 53 8D 10 3D F0 FF 00 CC 4D
    00 00 1C 53 30 41 B0 12 3E CB A2 43 58 02 82 43
    5A 02 F2 D0 80 00 29 00 30 41 0F 4C 0F 5D 03 3C
    CC 43 00 00 1C 53 0C 9F FB 23 30 41 0F 4C 04 3C
    CF 4D 00 00 1F 53 3E 53 0E 93 FA 23 30 41 0F 4C
    04 3C FF 4D 00 00 1F 53 3E 53 0E 93 FA 23 30 41
    0F 93 06 20 1D 42 54 02 1C 42 5C 02 B0 12 AC E3
    30 41 0F 4C 01 3C 1F 53 CF 93 00 00 FC 23 0F 8C
    0C 4F 30 41 35 41 34 41 37 41 36 41 39 41 38 41
    3B 41 3A 41 30 41 0C 12 CC 43 00 00 1C 53 1E 83
    FB 23 3C 41 30 41 4C 93 03 24 D2 D3 21 00 30 41
    D2 C3 21 00 30 41 32 D2 F2 D0 40 00 2C 00 F2 D0
    40 00 2D 00 30 41 2F 4C CF 4D 00 00 2F 4C 1F 53
    8C 4F 00 00 30 41 0F 4D 82 4C 24 02 0E 43 0D 43
    0C 4F 30 40 C2 C0 0F 4C 8F 43 00 00 8F 43 02 00
    0C 43 30 41 2F 48 A1 4F 02 00 2F 53 88 4F 00 00
    30 41 A2 93 58 02 FD 23 82 93 5A 02 FA 23 30 41
    0F 4C 8F 43 00 00 8F 43 02 00 0C 43 30 41 B2 C0
    10 00 82 01 92 42 80 01 80 01 30 41 0F 4C 8F 43
    00 00 8F 43 02 00 0C 43 30 41 82 93 5E 02 02 24
    82 43 5E 02 10 42 38 02 5C 42 28 00 4C 4C 3C F0
    40 00 0D 43 30 41 92 43 26 02 82 4C 28 02 30 40
    2E E0 4E 93 03 24 0C 5C 5E 83 FD 23 30 41 B1 C0
    D0 00 00 00 03 43 00 13 0C 47 1E 41 06 00 30 40
    6A E3 F2 C0 40 00 2D 00 30 41 92 43 46 02 30 40
    C2 C0 30 40 2C E5 30 40 3A E5 30 40 E4 E3 30 41
    30 41 30 41 FF 3F 
    @FFE6
    6A CB 
    @FFEE
    7A DB 
    @FFFA
    04 E5 
    @FFFE
    9A C0 
    q
    

    This is running, which means:

    -> 01 00 05 00 00 01 00 40 01 00 (from wlan_start(0))

    <- 02 00 00 00 07 04 00 10 02 00 02 00 (patch missing)

    -> 01 00 07 00 00 03 02 02 00 00 00 00 (send empty patch)

    <- 02 00 00 00 05 04 00 40 01 FF (success)

    -> "400B" (get packet size)

    <- Get packet (6) and packetsize back (0x5DC)

    WOW!!! Working with broken EEPROM!!!

    Then i start Code Composer Studio 5.4.0, open workspace

    C:\ti\CC3000SDK\CC3000 SDK\MSP430G2553\Basic WiFi Application\Basic WiFi Source\Basic WiFi Application CCS

    and compile the "Basic WiFi Application CCS".

    (I have minimal changes in the project, where i am almost sure it does not change internal functionality, e.g. i added nvmem_read_sp_version into main, which prints read version and similar things).

    It creates the following file, i hope BasicWiFi-Application.out is the output file, needed to flash?)

    (taken from C:\ti\CC3000SDK\CC3000 SDK\MSP430G2553\Basic WiFi Application\Basic WiFi Source\Basic WiFi Application CCS\BasicWiFi Application\Debug )

    0044.BasicWiFi Application.zip

    But it is not running, showing the error, getting no answer:

    (changed sequence because of wlan_start(0) instead of wlan_start(1))

    (copied only the above frames, not typed them in again, hopefully not made an error in comparison of SPI traces)

    -> 01 00 05 00 00 01 00 40 01 00

    <- 02 00 00 00 07 04 00 10 02 00 02 00

    -> 01 00 07 00 00 03 02 02 00 00 00 00

    => No answer from CC3000

    *** Result ***

    So now i have one TI platform (MSP430G2...), one time it is working, one time it is not working. In logic analyzer view, i don't see any real difference, perhaps problem is timing, or i have overseen an important point?

    Does someone have a hint, how to get the self-built software running? (i have in mind i perhaps read something about optimization levels, but is this needed? Is there something which is important to change after installation and before compiling?) -> I am new to MSP430 and Code Composer Studio, perhaps it is some well-known thing needed, which i don't know yet.

    I power over USB, i think i have seen that external power supply is suggested. But why does it (allways?) work in one software version and not working in other software version (with same power supply).

    Can someone with a broken CC3000 verify my 2 software version attached to this posting? One is working, the other is not working, but i think you need a logic analyzer to verify last frames exchanged. Additional hint: The one which is not working with broken EEPROM is printing version (in HEX!) like this over debug COM port:

    Example App:driver version 2.13.7.13
    SP-Version 01.13

    I hope to understand the difference between the two version, so i can learn what to change to get it fully running on every platform. When the self-compiled version is running, i can add additional delay or other changes to see what is important and what does not matter.

    Best regards,

    Martin

  • Hi Martin,

    We have seen before cases where upgrading the IDEs (CCS and IAR) results in applications stop working. It can be because of various reasons such as compiler changing, optimizer, etc. For example, migrating from IAR5.50 to IAR5.51 resulted in a sitiation where none of the applications worked. The reason was that all MSP430FR5739 changed their IVT so you needed to change the configuration file as well. We relized it after deep digging.

    In your case, I do not believe that the discrepancy is in debugger vs. flashing but more on the CCS version 5.4. When you flash the binary compiled by TI, it is with v5.3.

    In the release note it says: "Please note the release was tested on IAR 5.51.4 and on CCS v5.3 IDE".

    I suggest some tests that can be applied to verify it:

    • Can you revert to v5.3. If so, you can test if it is working.
    • You can use the output file (.out if you are using CCS or .txt if you are using IAR). You can then flash it and verify if it is working. My guess is that it would not work leading to conclusion it is not the debugger vs. flashing that makes the difference.

    I have CCS v5.3 but when I'm back tomorrow I'll check if someone already upgraded to v5.4. If so, I can give it a try.

    Regards,

    Shlomi

  • Hi Martin and all,

    It's really a good news to see that your broken module is running. Yes, it looks so strange that in one version works and with the other no...actually I don't have CCS so i can't do test. As I told you, I have broken my module too, trying to get the patch programmer application work (shame on me!)....well now I have ordered CC3000EM+MSP430EXPFR5739 board and so I will try to use software and projects directly provided by TI. I will get them in few days.

    Anyway I want to ask you if you have tried patch programming (project or binary) provided directly by TI (dedicated to MSP430G2...) to see if you can bring your module back to life and then check if it is alive also when you use it on your design platform (Stellaris I think, sorry if I'm wrong...). This is what I want to do with my broken CC3000 once I will have the FRAM board.

    I'm starting to think that maybe porting the Patch Programmer Application to other processors has some timing issues (or other type of issues, such as Step-by-step debugging or IDE version) because maybe the project is written and dedicated for the specific processors currently supported by TI and modify,port and adapt that project to our platforms can lead to unwanted behaviors. Of course, it's just a supposition, since I really don't know for sure.

    Thank you and Best Regards,

    Mario Demaria

  • Hi All,

    I have the same problem. Shlomi can you explain in simple steps what code is required to apply a patch to my CC3000 module.

    My set up is:

    - The module has the patches it came out of the box with, specifically version 1.10

    - The platform is an Atmel ATSAM4S (ARM based), the compiler is GCC

    - The SPI elements are ported correctly using the version 1.11 SDK from the wiki, I can run TI's functions to connect to APs, recieve data, make profiles, etc.

    - The patch programmer was ported by converting the functions main() and initDriver() in PatchProgrammer.c from the v11.1 patch programmer from the wiki to work with the above set up.

    When I run the code, as with the others, driverInit(1) calls wlan_start(1) which hangs forever.

    Your advice to change driverInit(1) to driverInit(0) after the fat writing is not applicable because the code has hung already before it gets to the fat writing stage.

    I have no idea why it doesn't work, for one thing because there is no information about what the difference is between wlan_start(0) and wlan_start(1) - could you clarify this?

    Are there some specific requirements for versions of the host firmware to be able to apply patches to particular versions of the module which we don't know about? If so what are these? Do I need to try to port an older version of the patch programmer? NB running diff between versions of the host driver files in v1.11 CC3000HostDriver from the wiki and from the patch programmer show no difference other than a line moved in cc3000_common.h.

    Best wishes,

    Tom

  • Hi Shlomi,

    just for completeness i have just done 2 x 3 tests, with MSP430G2 platform, once 3 not working traces from driver debug pin (self-compiled software) and once 3 working traces from driver debug pin (with pre-compiled software).

    2313.trace-debug-drvpin-20130829.zip

    See name "working" / "not working" in name of each trace.

    Best regards,

    Martin

  • Tom,

    The code is the Patch Programmer code and the steps are described in the code.

    Basically, there is a difference between MSP430FR5739 and Stellaris M4 platform but the difference is because firmware and driver patches cannot fit in the MSP platform. This is why it is divided into 2 sections. If you port the Patch Programmer you should be fine.

    There is no specific requirements of the base version you have on your device. It should work.

    As I suggested, there might be an issue with IDE versions newer than the ones we tested with. I asked in the forum if anyone can test it but no reply yet.

    What version are you using? CCS or IAR?

    Shlomi

  • Hi Martin,

    Thanks for the logs. There is nothing new in these logs, i.e. again I can see that in the non working case the event init done is printed so it should get to the host but I guess you cannot see the interrupt line going down. This is why it is getting stuck.

    Did you have the chance to run with older version of CCs/IAR to test my assumption?

    Regards,

    Shlomi

  • Hi Shlomi,

    i have only a newer IAR (don't know exactly which version, 6.1?, some eval, cannot open the project files) and cannot download CCS 5.3 (due to other bug that i cannot download anything from TI anymore).

    Someone else here in this thread/forum with a CCS 5.3 installed?

    Can you install CCS 5.4 and try if it is working on your side?

    Anything else we can try to narrow this long lasting bug?

    Best regards,

    Martin

  • Hi Shlomi,

    Shlomi Itzhak said:
    There is nothing new in these logs, i.e. again I can see that in the non working case the event init done is printed so it should get to the host but I guess you cannot see the interrupt line going down. This is why it is getting stuck.

    assuming there is a bug that interrupt line is not going down (for whatever reason). In one of my test (look on page 4 of this thread) i tried to read the answer (by hand by a key press) and it returned "02 00 FE 00 00". So even when WLAN_IRQ would go low, i would (perhaps) not get any data. Why?

    Assuming the CC3000 has all three patches (drv, bootloader, fw), what is it doing? Does it do some kind of restart with the patches (or ROM, because it got no patches from host)? Could it be that this action cleans/clears the send queue of SPI?

    Best regards,

    Martin

  • Dear Shlomi,

    Thanks for your response and confiming that there are no specific version requirements for the patch programmer (although this rules out another potential solution!).

    To answer your questions, I'm using neither CCS nor IAR, I'm using Atmel studio which is their propriatory IDE. I have to use this to be able to use Atmel's SPI drivers for their chip so as to be able communicate with the CC3000. The documentation suggested that the host drivers were agnostic to the SPI bus, so should this matter?

    If it is any help, my invesigations this morning show that the events between the microcontroller and the CC3000 go like this:

    - CC3000 is enabled

    - we detect it toggling its IRQ line to show it is awake

    - we call SimpleLink_init_start which sends the hci message HCI_CMND_SIMPLE_LINK_START with the SL_PATCHES_REQUEST_FORCE_HOST argument

    - we sit waiting for the HCI_CMND_SIMPLE_LINK_START opcode response event

    - during the wait get three unsolicited patch request events for driver, firmware and bootloader. In each case we send back zero length patches to acknowledge.

    - however the HCI_CMND_SIMPLE_LINK_START opcode event never comes so we sit in the loop looking for it forever.

    If I run the start up sequence with wlan_start(0) I don't get the three unsolicited patch requests, but I do get the HCI_CMND_SIMPLE_LINK_START opcode event and so get out of the waiting loop.

    Tom

  • Martin,

    What do you mean by trying to read the answer by hand? If for some reason you don't get the IRQ asserted, you cannot make it artificially and assume you read valid data. The data that should be transmitted tot he host at this phase is the init done:

    02 00 00 00 05 04 00 40 01 FF (doesn't have to be FF, it is the value initialized in the EEPROM).

    Upon initialization, if CC3000 identify a patch, it would load it to RAM. After loading all available patches, it jumps to the post patch section and continue running. At this point, it runs from ROM but whenever it reaches to a point that is patched, it bypass this location and runs the patch from RAM. Only after the patch is executed and returns, the program counter returns to the ROM location. There is no relation between the IRQ and the patches.

    Regards,

    Shlomi

  • Hi Tom,

    The host driver layer is platform independent but the SPI layer depends on the platform, i.e. Atmel has its own SPI layer that is obviously different from MSP, Stellaris, etc. But, I believe you ported it correctly as it does work for you (at least some commands). What you describe is the same as all are describing. I guess that in your case, init_driver(0) works since you do have valid patches flashed on the EEPROm (at least a driver patch). I still don't know the root casue of this behavior and I tried to reproduce it with all IDEs/platform I have. As soon as I have more findings I would share it in this thread.

    Regards,

    Shlomi

  • Hi Shlomi,

    Shlomi Itzhak said:
    What do you mean by trying to read the answer by hand?

    i control my platform from PC, like MSP430G2 Basic Wifi App. I can press keys on PC and do action on the platform, where the CC3000 is connected. I tried the well known startup sequence, where we agreed, that no WLAN_IRQ was coming. I see it not in SPI trace. So my try was to execute the interrupt service routine, usually called by the WLAN_IRQ, to read out possible data offered by CC3000. But I get only "02 00 FE 00 00" instead of "02 00 00 00 05 04 00 40 01 FF". So it looks like this try is not successful, it is no workaround for this situation.

    When CC3000 assumes it has already sent the answer, is it ready to execute a new command? So can i execute the command which has no answer, wait 1 minute, set certain variable and continue, like it had received an answer?

    Do you already have a clue where the problem is coming from? Any idea to narrow the problem or even for a workaround? Any progress or news from your side?

    Have you tried CCS 5.4 on your PC? Does CCS 5.4 work for you to generate a binary for MSP430G2 which can control CC3000 correctly? Are there any changes needed to get it running?

    Do you need any help from my/our side or can you meanwhile reproduce and analyze the error on your side? Shall we just keep silent, sit down and wait, so you can concentrate on your work? Please tell how to behave!

    Best regards,

    Martin

  • Hi,

    I'm in a process of installing V5.4. Apparently it takes some time.

    The only help from your side is by using IAR/CCS version as we used and verify if it works.

    Other than that I believe it is on TI's hand to try and reproduce it.

    Of course I'll update as soon as I have any update.

    Regards,

    Shlomi

  • Hi All,

    I just had a very interesting discovery that may shed some light on one of the issues we have been having here.  There seems to several variants of the problem here.  Mine specifically revolves around the hang during the initDriver(1) function.

    I just realized that during the bring up of the CC3000 I had slowed the SPI clock down.  I just returned the clock back to the original frequency and it no longer hangs in the initDriver(1) function.  I did some dialing in and found that a frequency of 1 MHz and greater for the clock works.  Frequencies lower than 952 KHz hangs.

    Because of a different bug I am tracking, I am unable to complete the patch upgrade process at this time but hope to be able to get to it soon.  The one thing that I did verify is the hang in initDriver(1) does go away when the frequency is increased.

    This leads me to two different approaches.  The first is that this is strictly a frequency problem.  The second is that it is a timing issue and changing the clock frequency affects timing.  I am not sure which one it would be.

    If anyone has some suggestions for experiments I could try to help determine which of the two options is the most likely, I will try it and publish the results.

    For those of you with the same problem, what is the frequency of the SPI clock of your specific application?

    Thanks,

    Brent

  • Hi Brent,

    Thanks for this, I can confirm that in my setup with my original 500kHz spi frequency wlan_start(1) would hang but with 2MHz it doesn't. This is progress.

    However, when I come to run the rest of the patcher code, although it now passes the wlan_start() function, it hangs in the same way as before on the next instruction (nvmem_get_mac_address). So I agree there is a timing issue certainly, but quite how to resolve it is slightly unclear.

    I'm in the process of searching through ti's patcher code to find out what spi frequency is used there and I will see if sticking strickly to that makes it work. However this does make me a little uneasy about the reliability of the product that relies on communication, particularly as the functions as coded hang rather than timing out with errors.

    Best wishes,

    Tom

  • All,

    Since the main issue involved getting the patch requests from the device during initialization, I have explored it some more. As said before, this mechanism is an old mechanism used during developement to enable downloading patches as not in the way we do today (today it is via nvmem_write). Thus, my main focus is to find a way to initialize with no patches and to restrict the device from asking the host for the patches. Luckily, I found a way to do it with no extra patches, just a minor change in the host driver code.

    Please follow the steps and try it on your side:

    1. in the main function, replace the first initDriver(1); with initDriver(2);
    2. remark the wlan_stop(); and following initDriver(1); right after the FAT writing
    3. in SimpleLink_Init_Start(), replace the line
      UINT8_TO_STREAM(args, ((usPatchesAvailableAtHost) ? SL_PATCHES_REQUEST_FORCE_HOST : SL_PATCHES_REQUEST_DEFAULT)); with
      UINT8_TO_STREAM(args, ((usPatchesAvailableAtHost) ? SL_PATCHES_REQUEST_FORCE_NONE : SL_PATCHES_REQUEST_DEFAULT));

    Explanations: using (flag == 2) actually does nothing. This is a better way to ignore the patches without asking the host for patches.

    In a nutshell, you should have now only two initDriver() calls, one at the beginning with flag == 2 and one at the end with flag == 0.

    Please let me know if it works for you. You can also verify you don't get the patch requests from the device anymore.

    Regards,

    Shlomi

  • Hi Shlomi,

    many thanks for this positive answer!

    So mainly this means to send (parameter SL_PATCHES_REQUEST_FORCE_NONE)

    01 00 05 00 00 01 00 40 01 02 (!!!)

    instead of

    (parameter SL_PATCHES_REQUEST_FORCE_HOST or SL_PATCHES_REQUEST_DEFAULT)

    01 00 05 00 00 01 00 40 01 01 or 01 00 05 00 00 01 00 40 01 00.

    First test looks promising.

    I was able to read some bytes from NVMEM (of broken EEPROM) and also was able to query SP version, even when the answer seems to be not a successful answer (but it is an answer instead of just hanging)

    0200000005 / 04070201FF

    instead of e.g.

    0200000009 / 040702050000060113 for SP version 1.19

    But this seems to be all doable and looking good.

    I will do further tests and report back if i can repair my modules with this workaround.

    Again many thanks for the help!

    Best regards,

    Martin

  • Hi Shlomi,

    success!!!

    I was able to update all my broken modules to SP version 1.19.

    One hint regarding the version query, where not the version, but (seems to be) a error code is returned.

    i think the "0 0" comes back, because the answer is smaller (1 instead of 5 bytes) from CC3000.
    Perhaps you see the negative return value from CC3000 in return value of nvmem_read_sp_version.
    In the code there is
    *patchVer = retBuf[3]; // package ID
    *(patchVer+1) = retBuf[4]; // package build number
    return(retBuf[0]);
    so i think retBuf[3] and retBuf[4] are random, due to "frame too short".
    So patchVer is perhaps only valid when retBuf[0] gives no error.
    I am looking forward seeing others confirming that it works.
    Best regards,
    Martin
  • Great!!!

    Looking forward to see if others can follow the steps.

    Shlomi

  • Hi Shlomi,

    Thanks for the update, yes that works! The module confirms its now on v 1.19. For me it appears that both raising the SPI frequency to 2MHz or removing the SL_PATCHES_REQUEST_FORCE_HOST argument of the simple link start command both enable getting past the wlan_start(1) line.

    (By the way, I also had a problem of the device hanging when doing the read_nvmem instruction, and this could be traced back to a too small read buffer buffer. I'd assumed that the right buffer length was CC3000_RX_BUFFER_SIZE, but this seems not to be the case. Is there a suggested buffer length?)

    Best wishes and thanks,

    Tom

  • Hi Tom,

    Great. You just need to verify that the CC3000_RX_BUFFER_SIZE is large enough to contain the data+overhead. Just to elaborate on the overhead: you have SPI header of 5 bytes, HCI header of 5 bytes and 24 bytes of arguments -> so a total of 34 bytes overhead. So if you have limited space for RX buffer, e.g. 50 bytes, you are left with 16 bytes for the payload (actually 1 less since we save it for CC3000_BUFFER_MAGIC_NUMBER).

    Regards,

    Shlomi

  • That makes sense. What about the size for the payload? For example if I want to use send() and recv() to send packet of, say, 1kB does that mean I need a buffer of 1k+34 bytes, or will the data be distributed between a number of spi transactions if the buffer is smaller than this?

    Regards,

    Tom

  • Actually the 34 bytes is for nvmem_read().

    The SPI layer is not responsible on sub dividing the payload into few transactions so the user must be aware of it.

    Regarding send() and rcv():

    The overhead for send() is 26 bytes (5 SPI, 5 HCI and 10 args)

    The overhead for recv() is 34 bytes (5 SPI, 5 HCI and 24 args)

    Shlomi

  • Hi All,

    I have successfully updated the patch to 1.11 on my board but I am now unable to connect to an access point.  The following is what I posted to another thread but was hoping you might have some insights also.  Does anyone have an idea of what might be happening?  (I have my own custom board and have had to port the application code to work on it and I have not made any changes to it.  This is where my problem may be but I have been unable to find any difference yet between v1.10.1 and v1.11 application code.

    I have tried all day to get 1.11 running and I still don't have it running.  I am wondering if I have missed a piece in the upgrade.

    I upgraded the FAT table, driver and fw on the CC3000 using the data from the 1.11 patch programmer source code.
    I upgraded the host driver using the 1.11 host driver code.
    I did not make any changes to my application code because it appears to be the same as what I have been running.

    After making the changes, I have the following observations:

    I can read the patch version - and it is correct at 1.19.
    I can read the MAC address and it is correct.
    Smart config does not work and it gets stuck waiting for it to finish.  This did work before the upgrade.
    Using wlan_connect as you suggested returns successful yet it does not show up on the network.
    Downloading a profile does not work either.  I don't know if it is downloading it correctly (since there is no documentation to decode what is loaded in the EEPROM) or if trying to use that profile is where the problem is.

    In all cases, when the socket(..) function is called after attempting to connect to an AP, it returns a -1 indicating failure.  I have not been able to ping the device yet so I believe the failure is in attempting to connect to the network.

    Any idea what is happening?  Did I miss a step in the porting of the code for the upgrade?

    Thanks,

    Brent

  • Brent,

    From your description it sounds as if V1.11 programming went well but you are able to communicate with the device only locally and not able to use it in order to communicate over WiFi.

    You should be capable of reading the FAT even with patches. Can you please read the followings and report:

    1. read the FAT
      return_status = nvmem_read(16, 52, 0, buffer);
    2. read the driver patch header
      return_status = nvmem_read(NVMEM_WLAN_DRIVER_SP_FILEID, 8, 0, buffer);
    3. read the firmware patch header
      return_status = nvmem_read(NVMEM_WLAN_FW_SP_FILEID, 8, 0, buffer);

    I suspect the FW is not flashed properly (or at all).

    Just to elaborate, MSP430FR5739 which has limited resources required us to divide the flashing procedure into 2 phases, driver and firmware. Which platform do you have? have you flashed both?

    Shlomi

  • Hi Shlomi,

    I was able to finally get the patch to install correctly.  I did all the things you suggested above and confirmed that all 3 sections of the patches matched the V1.11 patches (except for the Bit 0 enable bit of the FAT and some Bit 1 bits of the upper NVMEM sections.  I then re-installed the patches and I was then able to connect to WiFi.  The only difference in the install of the patches was the host driver version to install the patches.  I had used V1.10.1 originally and used V1.11 lastly.  I am not sure why this made a difference, but it did.

    Now, I am seeing some differences between V1.11 and V1.10.1.  When I run initDriver and then loop on the connected flag to connect to the AP, I am seeing a different behavior.  On V1.10.1, it took roughly 7 seconds to connect and was very consistent.  With V1.11, it takes anywhere from 1 second to 30 seconds to connect and then sometimes it doesn't even connect at all and I have to reboot in order to get a connection.  (Just to be clear, on V1.10.1, I did not have the loop for the connected flag - that was added with V1.11 - but I did use pinging to verify connection, which showed reliable consistent connection times.)  Do you have any explanation for this behavior.)

    I am also seeing another difference.  In the last couple of days, I have switched protocol from TCP to UDP.  (TCP was too slow in tearing down connections for our application so we are trying a UDP approach.)  For a test case, I create a socket and bind it.  I then loop on the recvfrom function waiting for data.  After about a couple minutes of looping, the host controller crashes.  It appears to be related to the host drivers because if I halt before calling the function that sets up the socket and loops, I can run forever without crashing.  The only thing in my loop is calling the unsolicited event handler and the recvfrom function with delays between them.  I don't know if this existed in V1.10.1 because I did not try UDP on that version.  It appears to be either a memory leak or a memory overflow.  Have you heard of this type of thing happening?  Any ideas?

    Thanks for your help,

    Brent

  • Hi Brent,

    First, I strongly suggest you open a new ticket with a better subject description than use this one.

    Second, unlike other versions, the migration to V1.11 requires upgrade to the host driver as well. The host driver and patches are tight together so probably this is the reason it worked for you with V1.11.

    V1.11 has a major fix for send/recv scenario so please make sure you integrated V1.11 well on your platform. Regarding the connection, there was a bug that could cause false alarm connection that is fixed on V1.11 (but if you say it is verified with a ping so I guess this is not the reason). You should wait for HCI_EVNT_WLAN_UNSOL_CONNECT and HCI_EVNT_WLAN_UNSOL_DISCONNECT to indicate connection.

    Again, in such issues it is a must to get as many logs from the device (I'm not sure if you managed to pull out logs from the device before but it is described in http://processors.wiki.ti.com/index.php/CC3000_Logger). Also, air sniffer is always good to have.

    Regards,

    Shlomi

     

  • Hi Shlomi,

    I have attempted to use the logger in the past but have come upon the level shifter snag.  I have noticed that several others have had questions about what to use as a level shifter and none have been answered that I am aware of.  Would a simple buffer with separate power supplies for input and output be adequate?

    Also, I have seen mention of air sniffers before.  Are you meaning something like wireshark or something different?

    Thanks,

    Brent

  • Hello Brent,

    regarding logger: Have a look for "TTL-232RG-VREG1V8-WE". Available from Mouser, Digikey and a lot others. Cost around 20 Euro, 25 US$, ...

    http://octopart.com/partsearch#search/requestData&q=TTL-232RG-VREG1V8-WE

    (also mentioned here http://processors.wiki.ti.com/index.php/CC3000_Radio_Tool )

    Check that it works with 1.8V level, before buying it.

    If you have the right cable, it already works at 1.8V level and you simply connect GND and data line to one of the debug pins of CC3000. No need for any additional level shifter.

    I cannot say anything regarding air sniffers.

    Best regards,

    Martin

  • Brent,

    Any level shifter of 3.3V to 1.8V will do. We use TI internal level shifter board.

    Regarding an air sniffer, wireshark usually probe the local WiFi interface on the PC so it is better than nothing but not as good as air sniffing tools (such as OmniPeek).

    Btw, does anyone else that upgraded to v1.11 has similar issues?

    Shlomi