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CC3220S: DAP Error1170 connecting to my target board

Stuart Robertson
Intellectual 840 points
Part Number: CC3220S


Hi,

I have developed my own board using the CC3220MODASM and have broken out all relevant connections including those for 4 wire JTAG. (I wish to continue development using my own target board with relevant connections from the Launchpad).

All working well apart from one issue where I get the (common) DAP Error 1170 after building my project in CCS when connecting the Launchpad JTAG (out) signals to my JTAG (in) signals on my board.

The usual cause I realise is the target being in Production Mode instead of Development mode. This is not the case as I have successfully put the target into Development Mode  and indeed my target system programs successfully using the UART load method.

What is strange is that the JTAG integrity connection test (using button 'Test Connection') passes 100% so I'm a bit surprised I get the DAP error after a CCS build and it can't connect to the target. This test I assume means all connectivity is correct (?) I have tried lowering the TCLK frequency to the minimum but still the same issue.

I guess I must be missing a step, any ideas ?

Some relevant screen captures below:

JTAG Integrity test result 

[Start: Texas Instruments XDS110 USB Debug Probe]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\Rober\AppData\Local\TEXASI~1\CCS\
ti\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioxds110.dll'.
The library build date was 'Sep 28 2018'.
The library build time was '17:26:33'.
The library package version is '8.0.803.0'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the XDS110 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for XDS110 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End: Texas Instruments XDS110 USB Debug Probe]

 

thks for support,

Stuart

  • 0
    Guru 80445 points

    Hi Stuart,

    This is pretty strange, I haven't seen such kind of issue before. Please make sure that your JTAG pin connection is correct (proper contact, not too long wires, proper GND connection). If you provide photo with reasonable quality how you have connected your board, I will look on it. Also make sure that you have selected correct SOP mode.

    BTW ... JTAG integrity connection test can return success even in case of JTAG connection is not correct. For example in case you have 4 wire JTAG and you connect TDI+TDO together, test will report success....

    Jan

  • 0 in reply to Jan D
    Intellectual 840 points

    Thanks Jan for coming back so promptly.

    Ok, I've found the issue while searching the forum (post title below) and its as you allude to in that its the SOP states.

    I still had my SOP at 010 (210) instead of 000 as I just duplicated what was used on the LP (didn't need to change it there). The definitions in the table do confuse me somewhat:

    UARTLOAD_FUNCTIONAL_4WJ works on the LP with CCS so I'm confused why I have to use FUNCTIONAL_4WJ  (000) on my target board ?

    Also do you know what the definition of 'FUNCTIONAL' is ? Is it when the program is loaded from FLASH into SRAM and executed ?

    CC3235MODASF - I can't program and debug this module (it means by using JTAG ( XDS110, Segger J-Link, OpenOCD ) & UART1; IDE CCS and UniFlash )

    80
    Vasili Shpileuski

  • 0 in reply to Stuart Robertson
    Guru 39650 points

    Hi,

    A few comments.

    UARTLOAD_FUNCTIONAL_4WJ works on the LP with CCS so I'm confused why I have to use FUNCTIONAL_4WJ  (000) on my target board ?

    You issue with SOP mode 010 may to be due to issue with your UART RX line. Please make sure that your RX line is at high during boot. In case is your RX in low or floating. Because this will cause false detection of break signal and device will goes into bootlaoder.

    Also do you know what the definition of 'FUNCTIONAL' is ? Is it when the program is loaded from FLASH into SRAM and executed ?

    Yes, that is correct.

    Jan