Dear TI,
First the basics:
- Processor: CC2640
- TI Code Composer Studio 6.1.2.00015
- TIRTOS Simplelink 2_13_00_06
- xdctools 3_30_03_47
- ble_cc26xx_2_01_01_44627
- Custom Board: charges via USB, but primarily operates off battery
I need to start by saying I'm not sure exactly where I should post this question as it involves several different modules: ti-arm compiler, BIM, BLE stack, and possibly TI-RTOS so apologies if it's not in the correct forum.
Description:
I am working on a custom board that occasionally gets wedged. We have a different team working on why that is happening. My job has been to get it to reboot and begin processing again. And -- wait for it -- keep the data that was collected before the crash. Fortunately the data is really small, about 256 bytes. We have a FLASH on board that is used to store the data but we really want to keep the Flash accesses to page writes for a lot of reasons the main one being power consumption.
I was able to get the watchdog timer working based on posts in the E2E forums. This worked out great.
Now on to the second part of my challenge. Save the data across a watchdog timer reset. Here's my current idea:
- Adjust the linker script so that 512 bytes is "removed". Since the CC2640 has 0x5000 (20kb), set the memory size to be 0x4e00 or 512 bytes less.
- Declare a hard pointer to access this "invisible RAM".
- In addition to the data itself, I would add a CRC-32 and a structure to manage the data block.
Seems simple enough. Here's what happened: There are three linker scripts: one for the BIM, one for the stack and one for the application. I looked at all three of them and discovered that none were using the top 512 bytes of RAM. So, as an experiment, I attempted part 2 of my plan: I declared a pointer to the "invisible RAM" and incremented the value. What I found was that one of the three executables was clearing that space, presumably the entire RAM. After reviewing my results, I decided it was time to post the following questions:
- Does the CC2640 core or boot ROM clear the entire RAM at reset?
- I am using TI-RTOS. Are there issues that may involve the RTOS?
- If I modify RAM_SIZE in all three projects from 0x5000 to 0x4e00 will the TI generated firmware "ignore" the top 512 bytes?
- Is there an easier way to do this? I know this isn't too common, but there are cases where it would be useful.
Thanks for your time and support,
ACV