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RTOS/CC2640R2F: Device hangs after BIOS_start() when osal_snv is set to 2

Mahesh Kumar PN
Prodigy 195 points
Part Number: CC2640R2F
Other Parts Discussed in Thread: BLE-STACK

Tool/software: TI-RTOS

Hi

I have issue when i try to extend SNV pages to 2 by extending OSAL_SNV = 2

In my .icf looks like below:


define symbol PAGE_SIZE           = 0x1000;
define symbol PAGE28_START            = 0x0001C000;
define symbol PAGE29_END            = 0x0001DFFF;


define block SNVSECT with alignment=PAGE_SIZE { ro section .snvSectors };
define block SNVSTK with fixed order { block SNVSECT};
place at end of SNV_FLASH { block SNVSTK };

My main looks like below

main()

{

initialize pin related components

ICall_init();

ICall_createRemoteTasks();

GAPRole_createTask();

creating BLE tasks

Initializing application components

watchdog enabling

BIOS_start();

}

With same .icf defining OSAL_SNV=1 works fine,

When OSAL_SNV = 2 ,Application starts and hangs after BIOS_start;

Watch dog reset is observed after this point!

I don't see any alignment error thrown by compiler both case!

Help me in solving this.

  • 0
    TI__Mastermind 33460 points
    Hello,

    Can you provide you entire .icf file? Please post as an attachment as opposed to pasting the file directly in the comment box.

    Is there a reason you are not able to use the default linker file. With the default linker file we have tested both OSAL SNV = 1 and 2.
  • 0 in reply to Sean2
    Prodigy 195 points

    cc26xx_app_and_stack.txt 
    /******************************************************************************

 @file       cc26xx_app_and_stack.icf

 @brief IAR ARM Linker Configuration File - BLE Application and Stack together

        Imported Symbols
        Note: Linker defines are located in the IAR IDE project using
        --config_def in Options->Linker->Extra Options.

        CACHE_AS_RAM:       Disables use of Cache in favor of using the region
                            as General Purpose RAM (GPRAM).
        CCxxxx:             Device Name (e.g. CC2650). In order to define this
                            symbol, the tool chain requires that it be set to
                            a specific value, but in fact, the actual value does
                            not matter as it is not used in the linker control
                            file. The only way this symbol is used is based on
                            whether it is defined or not, not its actual value.
                            There are other linker symbols that do specifically
                            set their value to 1 to indicate R1, and 2 to
                            indicate R2, and these values are checked and do make
                            a difference. However, it would appear confusing if
                            the device name's value did not correspond to the
                            value set in other linker symbols. In order to avoid
                            this confusion, when the symbol is defined, it should
                            be set to the value of the device's ROM that it
                            corresponds so as to look and feel consistent. Please
                            note that a device name symbol should always be
                            defined to avoid side effects from default values
                            that may not be correct for the device being used.
        FLASH_ROM_BUILD:    Build Flash portion of BLE stack to work with ROM
                            code. =1 for R1 devices, =2 for R2 devices.
        ENCRYPTION_ROM:     Reserve ECC Engine RAM space (necessary for Secure
                            Connections when using a FLASH_ONLY_BUILD).

        Exported Symbols
        Note: Can be used as externs in C code.

        PAGE_SIZE:            Size of Flash sector, in bytes.
        STACK_TOP: Location of the top of RAM.

 Group: CMCU, SCS
 Target Device: CC2640R2

 ******************************************************************************
 
 Copyright (c) 2013-2017, Texas Instruments Incorporated
 All rights reserved.

 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions
 are met:

 *  Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.

 *  Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.

 *  Neither the name of Texas Instruments Incorporated nor the names of
    its contributors may be used to endorse or promote products derived
    from this software without specific prior written permission.

 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 ******************************************************************************
 Release Name: simplelink_cc2640r2_sdk_1_40_00_45
 Release Date: 2017-07-20 17:16:59
 *****************************************************************************/

////////////////////////////////////////////////////////////////////////////////
// Memory Sizes
////////////////////////////////////////////////////////////////////////////////
define symbol FLASH_BASE            = 0x00000000;
define symbol RAM_BASE              = 0x20000000;
define symbol ROM_BASE              = 0x10000000;

if ( isdefinedsymbol(CC2650) )
{
  define symbol RAM_SIZE            = 0x00005000; // 20K
  define symbol FLASH_SIZE          = 0x00020000; // 128K
  define symbol ROM_SIZE            = 0x0001C000; // 115K
}
else // default to CC2650
{
  define symbol RAM_SIZE            = 0x00005000; // 20K
  define symbol FLASH_SIZE          = 0x00020000; // 128K
  define symbol ROM_SIZE            = 0x0001C000; // 115K
}

define symbol APP_DATA1_SIZE  		= 0x00000040;  // 64B
define symbol APP_DATA2_SIZE 		= 0x00000020; // 32B
define symbol PAGE28_START			= 0x0001C000;
define symbol PAGE29_END			= 0x0001DFFF;

////////////////////////////////////////////////////////////////////////////////
// Memory Definitions
////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////
// CM3 FW
//
define symbol FW_START              = 0x10000000;
define symbol FW_END                = 0x10004BFF;

////////////////////////////////////////////////////////////////////////////////
// RAM
//
define symbol RAM_START             = RAM_BASE;

if ( isdefinedsymbol(FLASH_ROM_BUILD) )
{
  if ( FLASH_ROM_BUILD == 1 ) // R1
  {
    if ( isdefinedsymbol(CC2650) )
    {
      define symbol RESERVED_RAM_SIZE = 0x00000718;
    }
    else if ( isdefinedsymbol(CC2642) )
    {
      define symbol RESERVED_RAM_SIZE = 0x00000B08;
    }
  }
  else if ( FLASH_ROM_BUILD == 2 ) // R2
  {
    define symbol RESERVED_RAM_SIZE = 0x00000C00;
  }
  else // default to CC2650 R1
  {
    define symbol RESERVED_RAM_SIZE = 0x00000718;
  }
}
else // FlashOnly build
{
  if ( isdefinedsymbol(ENCRYPTION_ROM) )
  {
    if ( ENCRYPTION_ROM == 1 ) // R1
    {
      if ( isdefinedsymbol(CC2650) )
      {
        define symbol RESERVED_RAM_SIZE = 0xD4;
      }
      else if ( isdefinedsymbol(CC2642) )
      {
        define symbol RESERVED_RAM_SIZE = 0x80;
      }
    }
    else if ( ENCRYPTION_ROM == 2 ) // R2
    {
      define symbol RESERVED_RAM_SIZE = 0x80;
    }
    else //
    {
      define symbol RESERVED_RAM_SIZE = 0;
    }
  }
  else // default
  {
    define symbol RESERVED_RAM_SIZE = 0;
  }
}

define symbol RAM_END             = RAM_START+RAM_SIZE-RESERVED_RAM_SIZE-1;

define symbol BOOTLOADERRAM_START  = 0x20000410;

////////////////////////////////////////////////////////////////////////////////
// Flash
//
define symbol WORD_SIZE             = 4;

if ( isdefinedsymbol(CC2650) )
{
  define symbol PAGE_SIZE           = 0x1000;
}
export symbol PAGE_SIZE;

if (isdefinedsymbol(PAGE_ALIGN))
{
  define symbol FLASH_MEM_ALIGN     = PAGE_SIZE;
}
else
{
  define symbol FLASH_MEM_ALIGN     = WORD_SIZE;
}

define symbol FLASH_START           = FLASH_BASE + APP_DATA2_SIZE ;

if ( isdefinedsymbol(CC2650) )
{
  define symbol PAGE_MASK           = 0xFFFFF000;
}

define symbol NUM_RESERVED_PAGES    = 4;  /*which includes ccfg at page 31,bootloader at page 30,snv area at page 28,29 */
define symbol RESERVED_SIZE         = (NUM_RESERVED_PAGES * PAGE_SIZE); /*reserved to add bootloader*/

define symbol FLASH_END             = FLASH_SIZE - RESERVED_SIZE - 1;


////////////////////////////////////////////////////////////////////////////////
// Stack
//

define symbol STACK_SIZE          = 0x300;
define symbol STACK_START         = RAM_END + 1;
define symbol STACK_END           = STACK_START - STACK_SIZE;
//
define symbol STACK_TOP           = RAM_END + 1;
export symbol STACK_TOP;

//////////////////////////////////////////////////////////////////////////////
// GPRAM
//
if ( isdefinedsymbol(CACHE_AS_RAM) )
{
  define symbol GPRAM_START           = 0x11000000;
  define symbol GPRAM_SIZE            = 0x2000;
  define symbol GPRAM_END             = GPRAM_START + GPRAM_SIZE;
}

////////////////////////////////////////////////////////////////////////////////
// AUX RAM Area
//

if ( isdefinedsymbol(AUX_AS_RAM) )
{
	define symbol AUX_RAM_START        = 0x400E0000;
	define symbol AUX_RAM_SIZE 		   = 0x800;
	define symbol AUX_RAM_END		   = AUX_RAM_START + AUX_RAM_SIZE;
}

////////////////////////////////////////////////////////////////////////////////
// Flash Interrupt Vector Table
//

define symbol INTVEC_NUM_ENTRIES  = 50 + 1; // first entry is stack location
define symbol INTVEC_SIZE         = INTVEC_NUM_ENTRIES + 4;

////////////////////////////////////////////////////////////////////////////////
// Memory Regions
////////////////////////////////////////////////////////////////////////////////

define memory mem with size = 4G;

define region RAM                 = mem:[from RAM_START   to RAM_END];
define region FLASH_LAST_PAGE     = mem:[from(FLASH_SIZE) - PAGE_SIZE- PAGE_SIZE to FLASH_SIZE+FLASH_SIZE-1];
define region FLASH               = mem:[from FLASH_START to FLASH_END];
define region FLASH_ALL           = mem:[from FLASH_START to FLASH_END - SIGNATURE_SIZE];

define region SNV_FLASH            = mem:[from PAGE28_START     to PAGE29_END];

if ( isdefinedsymbol(CACHE_AS_RAM) )
{
   define region GPRAM               = mem:[from GPRAM_START to GPRAM_END];
}

if ( isdefinedsymbol(AUX_AS_RAM) )
{
  define region AUX_RAM       = mem:[from AUX_RAM_START to AUX_RAM_END];
}

////////////////////////////////////////////////////////////////////////////////
// Memory Placement
////////////////////////////////////////////////////////////////////////////////

// Bootloader Ram data
place at address mem:BOOTLOADERRAM_START 	{ section .bootLoaderRam };

// Code and RO Data
place in FLASH_ALL { readonly };

// ccfg is at 0x1F000to 0x1FFFF part of bootloader in app,bootloader starts at 0x1E000 to 0x1EFFF
// CCFG
//place at end of FLASH_LAST_PAGE { readonly section .ccfg };
//keep { section .ccfg };

// Interrupt Vector Table
place at address mem:FLASH_START { readonly section .intvec };
keep                             { readonly section .intvec };

// Appdata
place at address mem:0x1BF80 	{ readonly section appdata_section };
keep 							{ readonly section appdata_section };


// SNV Area
define block SNVSECT with alignment=PAGE_SIZE { ro section .snvSectors };  
define block SNVSTK with fixed order { block SNVSECT};
place at start of SNV_FLASH { block SNVSTK };
 
// RAM Vector Table
place at start of RAM { section .vtable_ram };

// Runtime Stack
define block CSTACK with alignment = 8, size = STACK_SIZE { section .stack };

define block RWDATA with alignment = 8 { rw };

if ( isdefinedsymbol(CACHE_AS_RAM) )
{
  // GPRAM
  define block GPDATA { section .bss };
  place in GPRAM { block GPDATA }  except{ object ll.o };
}


place at address mem:0x20000210		{readwrite section .appdataBuffer};
keep 								{readwrite section .appdataBuffer};

// Aux Ram section
if ( isdefinedsymbol(AUX_AS_RAM) )
{
  place at address mem:AUX_RAM_START  {readwrite section .auxram};
  keep								  {readwrite section .auxram};
  
  define block AUXDATA { section .data object DevInfoService.o };
  place in AUX_RAM { block AUXDATA};
  
}

define section .heap_start            { public heapStart: };
define section .heap_end              { public heapEnd: };
define block   HEAP_END with size = 1 { section .heap_end };

define block END_OF_RAM with fixed order {
                                        block HEAP_END,
                                        block CSTACK
                                      };

place at end of RAM { block END_OF_RAM };

place in RAM { block RWDATA,
               last section .heap_start};

////////////////////////////////////////////////////////////////////////////////
// Initialization
////////////////////////////////////////////////////////////////////////////////

initialize by copy { readwrite };

do not initialize
{
  section .noinit,
  section .stack,
  section .bootLoaderRam,
};

////////////////////////////////////////////////////////////////////////////////
// The USE_TIRTOS_ROM symbol is defined internally in the build flow (using
// --config_def USE_TIRTOS_ROM=1) for TI-RTOS applications whose appBLE.cfg file
// specifies to use the ROM.
//
if (isdefinedsymbol(USE_TIRTOS_ROM)) {
     include "TIRTOS_ROM.icf";
}

    The above is the .icf file i use for my application,kind of derived from examples

    I have some data inserted into flash area in some places(which is needed for application to run properly)

    I tried using but same behavior was observed.

  • 0 in reply to Mahesh Kumar PN
    TI__Mastermind 33460 points
    Hello,

    In the SDK you are using OSAL SNV=2 is not easily relocatable from page 30 via only linker file. Unforuntately, it still relies on some defines to be moved. Specifically you will need to change source\ti\blestack\hal\src\target\_common\hal_board_cfg.h

    Change HAL_NV_PAGE_END from 30 to 29.
  • 0 in reply to Sean2
    TI__Mastermind 33460 points

    This has been fixed in future SDKs.

    I have updated the following wiki page with the information discussed here: http://processors.wiki.ti.com/index.php/CC2640R2_Porting_Projects#Known_Issues_.2F_Workarounds_for_BLE5v1.0.1

  • 0 in reply to Sean2
    Prodigy 195 points

    This seems to resolve my issue,But do we have any other way to do the same like define it from application or using compiler setting instead of touching stack?

    I am using simplelink_cc2640r2_sdk_1_40_00_45,Can you please mention exactly from which stack version this has been fixed?
    I have one little query with same .icf file with OSAL_SNV=1 binary is generated until 0x1bf9f(empty is not included as a part of binary,which fits My requirement)but with OSAL_SNV = 2 ,I see that binary is generated until 0x1dfdf.
    If snv is allocated then it should end with 0x1dfff ,is there some auto generated stack parameter controlling this?
    Is there an way to limit binary generation to limit to 0x1bf9f since there is not useful data after that?

  • 0 in reply to Mahesh Kumar PN
    TI__Mastermind 33460 points

    Hello,

    Are you using the blestack (BLE-Stack 3.x) component or the ble5stack (BLE5-Stack 1.x) component of the simplelink_cc2640r2_sdk_1_40_00_45?

    This is fixed in the blestack component but not the ble5stack.

    Regarding your second query, you would like to remove SNV from your generated binary, is that correct?

  • 0 in reply to Sean2
    Prodigy 195 points

    Hi Sean2,

    Marked resolved by mistake,
    I am using BleStack v 3.1.0 (not ble5stack component) can you please tell me exact immediate version where this is fixed.

    Regarding Second query,
    Yes not only the snv area but also any other unused area at the end of binary.

  • 0 in reply to Mahesh Kumar PN
    TI__Mastermind 33460 points
    Hello,

    I have investigated the issue further and have confirmed that code is in place to use relocatable two page NV in BLE-stack 3.1.0 component of simplelink_cc2640r2_sdk_1_40_00_45. However, I missed one part, the flag FEATURE_OAD must be set on the _stack_library project.

    If this flag is not set the HalFlashGetAddress() function will use the hard coded offsets, as opposed to an arithmetic calculation.
    I have confirmed that using a subset of your linker file will work when FEATURE_OAD is set on the stack side. You will need to rebuild both stack and app with this change.

    I have requested that the R&D team make this the default behavior.

    You can use a tool like Srecord srecord.sourceforge.net/ or Intelhex pypi.python.org/.../IntelHex to trim the unused sections of the binary. Both tools are able to trim a hexfile or binary after a given address.