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CC2640R2F: Internal Bias and CC2640 implementation questions

Part Number: CC2640R2F
Other Parts Discussed in Thread: CC2640,

My customer has the following questions. They amount to helping confirm their understanding from the data sheet, slide deck (CC2640 overview) to get a better understanding of the CC2640R2F inside topology and how best to interface with it given their space constraints. 

 

Questions:

Figure 7-1 (CC2640R2F datasheet: SWRS204A –DECEMBER 2016–REVISED JANUARY 2017) depicts 3 application circuits.  For our application, we are highly real estate limited, yet desire the highest path loss tolerance (highest output power & best receive sensitivity).  I’d like to confirm a couple things:

1.Internal bias is referenced for all three sample circuit topologies.  How is internal bias accomplished?  Assume the 15nH inductor in the single ended circuits is for DC bias alone and is not needed for impedance matching or transforming?
2.With internal bias, the single ended circuit with one antenna has the fewest component parts count.  Can you confirm that the Rx sensitivity is -95dBm and the output power is +2dBm for this topology? 
3.Adding the 15nH bias inductor improves Rx sensitivity to -96dBm?
4.Other than the 1dB reduction in Rx sensitivity, is there any other disadvantage to using internal bias?
5.Is the 12pF output capacitor just for DC bias or is this capacitance necessary to match to 50 Ohms?
6.Can TI share a “simplified” topology for the Tx output / Rx Input circuitry inside the part?
7.Is there any specific concern regarding static discharge or any recommended circuit accommodations to static? 

 

Thanks!

  • Hi Mark,
    1. The internal bias is accomplished by resistive network internal to the chip. The device can be configured in software for this.
    2. Yes, these are expected results when internally biased.
    3. Adding 15nH along with external bias configuration will improve the performance by 1dB depending again on the layout.
    4. No.
    5. Its a dc block.
    6. perhaps with NDA
    7. Please refer to ESD guidlines in the datasheet.