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CC1101 Asynchronous Serial Operation

SkyBlue
Intellectual 320 points
Other Parts Discussed in Thread: CC1101

This is a question related to the CC1101 sub 1 GHz radio chip. In section 27 of the CC1101 datasheet, it describes the asynchronous serial operation. It explains that the CC1101 modulator samples the level of the asynchronous input 8 times faster than the programmed data rate. Does this 8-time oversampling happen on the TX side or RX side? If it happens on the RX side, does this mean that the RX side must have the knowledge of the TX data rate? If it happens on the TX side, does the RX have to know the TX data rate to be able to demodulate it?

  • 0
    TI__Mastermind 39860 points

    The oversampling happens on both the RX and TX side. On the RX side you do not need to know the TX rate. However, if you transmit at 100 kbps and the RX is programmed for 50 kbps the effective oversampling will not be 8, but 4. If the TX is 50 kbps and RX is 100 kbps the effective oversampling will be 16.

    The asynchronous serial mode gives access to raw demodulator data without any data decision. The data stream is a time-discrete using 8 samples per bit. If you program 38.4 kbps  each bit is 26 us. The "jitter" can then be +/-3.3 us (26/8). In asynchronous serial mode you can see the un-synchronous data has this jitter or even spikes due to noise because no bit desicion is done in the chip. One thought is to program the CC1101 to a higher data rate then is actually used. Using 153.3 kBaud instead of 38.4 kBaud will give less jitter due to higher samplings rate. That is, operating at 38.4 kbps, but programming the chip for 153.6 kbps means that the data is oversampled by a factor of 32.

    If you are going to use the asynchronous serial mode, make sure that the interfacing MCU does proper oversampling and that it can handle the jitter the RF communication introduces.

  • 0 in reply to Sverre
    Prodigy 70 points

    It is a nice explanation of the asynchronous serial mode.

    Should a preamble sequence (eg 101010....) be transmitted before the real data (using GFSK) in order to set the RX AGC?  If the real data rate is 38.6kbps and CC1101 is programmed to 38.6kbps, I suppose the preamble should be transmitted at 38.6kbps.  If the real data rate is 38.6kbps but CC1101 is programmed to 153.6kbps, should the preamble be transmitted at 153.6kbps?  What is the recommended preamble pattern for asynchronous serial mode?

  • 0 in reply to buta san
    TI__Mastermind 39860 points

    Long overdue...........

    Preamble is needed to set up the AGC. The AGC works on amplitude, but the bit slicer needs transitions to determine the slicing level. A 0-1 preamble has the most transitions for a given time duration so this is the recommended preamble

    If your data is 38.6 kbps and you increse the programmed data rate to 153.6 kbps the preamble should be the same as the data (38.6 kbps in this case).