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TRF7960A: Questions on FIFO

Doug Morris
Prodigy 80 points
Part Number: TRF7960A

trf7960a.pdf

Questions are imbedded in the attached data sheet on page 28, 29, 56 and 60.

  • 0
    TI__Guru*** 128255 points

    Hello Doug,

    The questions on 28 & 29 are hard to understand, but I think they are concerning FIFO handling and then I would refer to our example code to understand how we recommend the FIFO to be handled: http://www.ti.com/lit/zip/sloc297

    Question on Page 56: Yes, bytes not bits - I will mark that as a typo to fix if we do another DS update

    Question on Page 60: It's a threshold, so 9 bytes or more would be accurate as well, but really it's triggered the moment 9 bytes are present in the FIFO and hence the wording. The moment that bit is set, an IRQ will fire, but based on IRQ service time it's not unusual for more than 9 bytes to present by the time the FIFO status is read. Same goes for the 3 bytes on TX threshold which indicates when the FIFO needs to be filled with more data (if applicable).

    Can you please ask the customer to not use PDF comments next time? It's not very friendly for me to have to open up a document, scroll through pages, and read comments that are hard to understand because of the formatting of the text...

  • 0 in reply to Ralph Jacobi
    TI__Prodigy 80 points
    Follow up question...
    I also need to know if the “FIFO level too low” bit in the FIFO status register will toggle multiple times in a scenario when I use it to detect when more data should be sent to the device. In one case, our device needs to transmit 16 bytes and I would like to use the “FIFO level too low” bit to essentially perform flow control on the SPI in cases where there is a low data rate over the RFID interface due to interference. Can you confirm that if I put 4 bytes into the FIFO, then the status bit will go low, then at some time after that the bit will go high because a byte has been transmitted from the FIFO to the RFID tag, and then if I put more data again in the FIFO the bit will go low again (and this will repeat until at 16 bytes have been transmitted)?
  • 0 in reply to Doug Morris
    TI__Guru*** 128255 points
    Hello Doug,

    In theory it should, but we've NEVER used the device that way before, so I cannot guarantee it and I do not agree with his described methodology. The FIFO should be filled with 12 bytes of data, then he should wait until the IRQ interrupt for FIFO low arrives (0xA0, TX Started, FIFO Low) to add the last 4 bytes into the FIFO. That is how the device should be handled.

    If he can manage to get his other method to work then he can do so as he wishes, but we won't support debug/troubleshooting if that method fails.