Original question:
Tool/software: Code Composer Studio
Hi,
I am using RF430FRL152HEVM kit for NFC communication with mobile phone. I want to perform read and write operation from mobile phone to RF430FRL152HEVM kit. Can you provide any basic example code so that i could test this functionality with minimum efforts.
I have not found any example code (firmware) from TI weblink regarding this functionality .
Thanks,
Anil Garg
Hello Anil,
Using our NDEF example project from the provided web examples, I used the following two applications with my Samsung Galaxy S7 Active device:
NFC Tools by wakdev (I presume this is the NFC Tool you are referencing as it was the top result for me under that search within Play Store):
NFC TagInfo by Michael Roland (Hagenburg Research):
Both apps had no issue reading the tag.
Regarding Code Generation tool, that is not something we have, sorry.
Regarding max NDEF size, that is defined by the NFC Forum, not ISO15693. I believe it is set to be 2^16-1 or 65535 bytes, but I am not positive, you'd have to verify with NDEF standards if curious. However that maximum won't apply for the RF430FRL15xH devices as they are limited by available memory so you are looking at 3kB of NDEF memory maximum and that is if you don't use any other features on the device. After developing your host controller firmware, whatever space is left would be the largest NDEF message that you can use with the device.
Hi, I have tried multiple times with different smart phone but every time I am able to read only attched messages(screen shots). I am not able to read data (ti.com). Please confirm that is there any hardware settings for reading NDEF memory initially. ?
Can you share source code with which you have tested before..?
Ralph Jacobi:
Regarding max NDEF size, that is defined by the NFC Forum, not ISO15693. I believe it is set to be 2^16-1 or 65535 bytes, but I am not positive, you'd have to verify with NDEF standards if curious. However that maximum won't apply for the RF430FRL15xH devices as they are limited by available memory so you are looking at 3kB of NDEF memory maximum and that is if you don't use any other features on the device. After developing your host controller firmware, whatever space is left would be the largest NDEF message that you can use with the device.
Anil:
1. Size of FRAM is 2 kB as per data sheet then is it possible to extend NDEF memory size upto 3kB?
2. In NDEF message format : length and payload length is allocated by 1 byte of space (as per below message) which is maximum possible upto 255 bytes of length. then how can we define NDEF memory which is greater then 255 bytes in a single variable ?
NDEF mamory:
// Block 1
0x03, // NDEF Message present
0x0B, // Length , 11 bytes
0xD1, // Record header
0x01, // type length
// Block 2
0x07, // Payload length
0x55, // Record Type U (URI)
0x01, // URI header identifier
0x74, // 't'
// Block 3
0x69, // 'i'
0x2E, // '.'
0x63, // 'c'
0x6F, // 'o'
// Block 4
0x6D, // 'm'
0xFE, // TLV terminator
0x00, // Empty don't care
0x00 // Empty don't care
};
Example code (using for testing):
Main.c:
#include "NDEF.h"
#include "types.h"
#include "patch.h"
#include <rf430frl152h.h>
//*****************************FUNCTION PROTOTYPES********************************/
void DeviceInit(void);
//********************************************************************************/
/*********************** SUMMARY **************************************************************************************************
* This project *only* utilizes the RF stack (ISO15693) on the ROM of the RF430FRL15xH. This setup allows the user to make a
* custom application that is run from FRAM. Only the RF13M vector that runs the RF stack needs to be pointing to its
* ROM location.
*/
/**************************************************************************************************************************************************
* Code Space
***************************************************************************************************************************************************
*
* Please check the lnk_rf430frl152h_NFC_Only.cmd file to customize how much code space is used for NDEF message ("FRAM_NDEF")
* or for code ("FRAM_CODE").
*
**************************************************************************************************************************************************/
/**************************************************************************************************************************************************
* Main
***************************************************************************************************************************************************
*
* Brief : Program entry.
*
* Param[in] : None
*
*
* Param[out]: None
*
* Return :
*
**************************************************************************************************************************************************/
void main()
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
// ROM RF13M module setup ** The following three lines are needed for proper RF stack operation
DS = 1; // ROM variable needs to be initialized here
asm ( " CALL #0x5CDA "); // Call ROM function ( Initialize function pointers)
asm ( " CALL #0x5CAC "); // Call ROM function ( Check part configuration)
initISO15693(CLEAR_BLOCK_LOCKS); // clear all block locks
//initISO15693(0); // leave block locks as they are set in FRAM
//JTAG is set to be disabled in this function call
DeviceInit();
while(1)
{
// Enter application code here...
__bis_SR_register(LPM3_bits + GIE);
}
}
/**************************************************************************************************************************************************
* DeviceInit
***************************************************************************************************************************************************
*
* Brief : Initialize the clock system and other settings
* Patchable function
*
* Param[in] : parameters: has these independent options
* INITIALIZE_DEVICE_CLOCK_SYSTEM - initializes the clock system
* POPULATE_INTERRUPT_VECTOR_IN_INITIALIZATION - populate the default interrupt vectors and recalculate their CRC
*
* Param[out]: None
*
* Return None
*
* Patchable : Yes
**************************************************************************************************************************************************/
void DeviceInit(void)
{
P1SEL0 = 0xF0; //keep JTAG
P1SEL1 = 0xF0; //keep JTAG
// P1SEL0 = 0x00; //no JTAG
// P1SEL1 = 0x00; //no JTAG
P1DIR &= ~0xEF;
P1REN = 0;
CCSCTL0 = CCSKEY; // Unlock CCS
CCSCTL1 = 0; // do not half the clock speed
CCSCTL4 = SELA_1 + SELM_0 + SELS_0; // Select VLO for ACLK and select HFCLK/DCO for MCLK, and SMCLK
CCSCTL5 = DIVA_2 + DIVM_1 + DIVS_1; // Set the Dividers for ACLK (4), MCLK, and SMCLK to 1
CCSCTL6 = XTOFF; // Turns of the crystal if it is not being used
CCSCTL8 = ACLKREQEN + MCLKREQEN + SMCLKREQEN; //disable clocks if they are not being used
CCSCTL0_H |= 0xFF; // Lock CCS
return;
}
//#pragma vector = RFPMM_VECTOR
//__interrupt void RFPMM_ISR(void)
//{
//}
//
//#pragma vector = PORT1_VECTOR
//__interrupt void PORT1_ISR(void)
//{
//}
//
//#pragma vector = SD_ADC_VECTOR
//__interrupt void SD_ADC_ISR(void)
//{
//}
//
//#pragma vector = USCI_B0_VECTOR
//__interrupt void USCI_B0_ISR(void)
//{
//}
//#pragma CODE_SECTION(RF13M_ISR, ".fram_driver_code") // comment this line for using ROM's RF13M ISR, uncomment next one, see .cmd file for details
#pragma CODE_SECTION(RF13M_ISR, ".rf13m_rom_isr") // comment this line for creating a custom RF13M ISR that will exist in FRAM, bypassing ROM's, uncomment previous
#pragma vector = RF13M_VECTOR
__interrupt void RF13M_ISR(void)
{
// Right now this vector is pointing to the ROMs firmware location that runs the RF stack.
// Entering code here will, without changing the CODE_SECTION lines
// above, will cause an error.
// Changing the code section above will cause the ROM RF stack to be bypassed. New handler will need to be created.
}
//#pragma vector = WDT_VECTOR
//__interrupt void WDT_ISR(void)
//{
//}
//
//#pragma vector = TIMER0_A1_VECTOR
//__interrupt void TimerA1_ISR(void)
//{
//}
//
//#pragma vector = TIMER0_A0_VECTOR
//__interrupt void TimerA0_ISR(void)
//{
//}
//
//#pragma vector = UNMI_VECTOR
//__interrupt void UNMI_ISR(void)
//{
//}
//
//#pragma vector = SYSNMI_VECTOR
//__interrupt void SysNMI_ISR(void)
//{
//}
NDFE.c
//This project is based on the RF430FRL152H. However it will work as well on the RF430FRL154H.
//However ROM_SENSOR_SUPPORT_DISABLED (or ROMSensorSupportEnable see above for both )must be set in the firmware system control register. This is forced automatically on the RF430FRL154H.
//This setting is needed to disable the ROM which uses block 0... as virtual registers, however this memory is needed for NDEF purposes.
#define FIRMWARE_CONTROL_ADDRESS 0xF867
#pragma RETAIN(Firmware_System_Control_Byte);
#pragma location = FIRMWARE_CONTROL_ADDRESS
//This variable needs to be kept declared and as "volatile" for the BlockLockROM_Patched function to work properly. Assignment can be changed however.
volatile const u08_t Firmware_System_Control_Byte = ROM_SENSOR_SUPPORT_DISABLED + EROM_EUSCI_SUPPORT_DISABLED + NFC_BRIDGE_DISABLED + FOUR_BYTE_BLOCK + FIRST_ISO_PAGE; //0x7F, // this value sets the firmware system control register
// ROM variables - DO NOT CHANGE !!!
// Declared to protect from use by compiler
/********************************************/
#pragma RETAIN(DS)
#pragma location = 0x1C00
u08_t DS;
#pragma RETAIN(RF)
#pragma location = 0x1C6A
const u08_t RF;
#pragma RETAIN(NRX)
#pragma location = 0x1CA4 //rx
const u08_t NRX[34];
#pragma RETAIN(NTX)
#pragma location = 0x1CC6 //tx
const u08_t NTX[33];
#pragma RETAIN(EL)
#pragma location = 0x1CF2
const u08_t EL;
#pragma RETAIN(PF)
#pragma location = 0x1C0A
const u16_t PF[48];
/********************************************/
/*
* This is an NDEF message: www.ti.com
* This can be made longer and edited as necessary. However it is limited to the first page (about 968 bytes),
* the second page is mainly used for patch firmware, but can be read over NFC as well, with proper commands.
*/
#define NDEF_START_ADDRESS 0xF868
#pragma RETAIN(NFC_NDEF_Message);
#pragma location = NDEF_START_ADDRESS; // the location of the address
const u08_t NFC_NDEF_Message[21] = {
// Block 0
0xE1, // NDEF Magic Number
0x40, // Version Number, read/write access conditions
0x79, //0x7E, // 1008 bytes / 8 = 126 blocks
0x00,//0x04,//8 byte extended memory //0x00, // does not support read multiple blocks (limited to only 3 blocks)
// Block 1
0x03, // NDEF Message present
0x0B, // Length , 11 bytes
0xD1, // Record header
0x01, // type length
// Block 2
0x07, // Payload length
0x55, // Record Type U (URI)
0x01, // URI header identifier
0x74, // 't'
// Block 3
0x69, // 'i'
0x2E, // '.'
0x63, // 'c'
0x6F, // 'o'
// Block 4
0x6D, // 'm'
0xFE, // TLV terminator
0x00, // Empty don't care
0x00 // Empty don't care
};
/**************************************************************************************************************************************************
* initISO15693
***************************************************************************************************************************************************
*
* Brief : Initializes the RF Stack
*
* Param[in] : parameter - the configuration to setup the ISO15693 (option to clear the lock blocks)
*
* Param[out]: None
*
* Return None
**************************************************************************************************************************************************/
void initISO15693(u16_t parameters )
{
RF13MCTL |= RF13MTXEN + RF13MRXEN + RF13MRFTOEN; // set up rx and tx functionality on RF13M module
// enable interrupts ** Do not change the following two lines, needed for proper RF stack operatoin
RF13MINT |= RF13MRXIE + RX13MRFTOIE; // enable interrupts on RX and on timeout and over and under flow checking
if (parameters & CLEAR_BLOCK_LOCKS )
{
memset ((u08_t *) FRAM_LOCK_BLOCKS, 0xFF, FRAM_LOCK_BLOCK_AREA_SIZE); //block is locked with a zero bit, clears FRAM and RAM lock blocks
}
// BlockLockAPI(3, LOCK_BLOCK); //Test this API
//
// BlockLockAPI(3, CHECK_LOCK); //Test this API
}
/**************************************************************************************************************************************************
* BlockLockAPI
***************************************************************************************************************************************************
*
* Brief : Locks a block either in FRAM or in RAM.
*
* Param[in] : block - The block to lock. In 4-byte mode this will lock two blocks and depends on the page selected.
*
* Param[out]: None
*
* Return None
**************************************************************************************************************************************************/
u16_t BlockLockAPI(u16_t block, u08_t checkLock)
{
u16_t locked;
locked = BlockLockROM_Patched(block, checkLock );
return locked;
}
lnk_rf430frl152h_NFC_Only.cmd:
/****************************************************************************/
/* Specify the system memory map */
/****************************************************************************/
MEMORY
{
SFR : origin = 0x0000, length = 0x0010
PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0
PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100
RAM : origin = 0x1C00, length = 0x1000
//ROM ISRs, starting points, length not correct
RF13M_ROM_ISR : origin = 0x54D0, length = 0x0002
// code area, can be increased / decreased
// FRAM_NDEF + FRAM_CODE lengths must equall 0x768 (with FRAM_NDEF starting at 0xF868)
// Two sections together in the range of 0xF868-0xFFCF
FRAM_NDEF : origin = 0xF868, length = 0x0068 // ends at 0xF8CF - NDEF memory section
FRAM_CODE : origin = 0xF8D0, length = 0x0700 // ends at 0xFFCF - Firmware memory section
JTAGSIGNATURE : origin = 0xFFD0, length = 0x0004, fill = 0xFFFF
BSLSIGNATURE : origin = 0xFFD4, length = 0x0004, fill = 0xFFFF
INT00 : origin = 0xFFE0, length = 0x0002
INT01 : origin = 0xFFE2, length = 0x0002
INT02 : origin = 0xFFE4, length = 0x0002
INT03 : origin = 0xFFE6, length = 0x0002
INT04 : origin = 0xFFE8, length = 0x0002
INT05 : origin = 0xFFEA, length = 0x0002
INT06 : origin = 0xFFEC, length = 0x0002
INT07 : origin = 0xFFEE, length = 0x0002
INT08 : origin = 0xFFF0, length = 0x0002
INT09 : origin = 0xFFF2, length = 0x0002
INT10 : origin = 0xFFF4, length = 0x0002
INT11 : origin = 0xFFF6, length = 0x0002
INT12 : origin = 0xFFF8, length = 0x0002
INT13 : origin = 0xFFFA, length = 0x0002
INT14 : origin = 0xFFFC, length = 0x0002
RESET : origin = 0xFFFE, length = 0x0002
}
/****************************************************************************/
/* Specify the sections allocation into memory */
/****************************************************************************/
SECTIONS
{
GROUP(ALL_FRAM)
{
GROUP(READ_WRITE_MEMORY)
{
.TI.persistent : {} /* For #pragma persistent */
.cio : {} /* C I/O buffer */
.sysmem : {} /* Dynamic memory allocation area */
}
GROUP(READ_ONLY_MEMORY)
{
.cinit : {} /* Initialization tables */
.pinit : {} /* C++ constructor tables */
.init_array : {} /* C++ constructor tables */
.mspabi.exidx : {} /* C++ constructor tables */
.mspabi.extab : {} /* C++ constructor tables */
.const : {} /* Constant data */
}
GROUP(EXECUTABLE_MEMORY)
{
.text : {} /* Code */
}
} > FRAM_CODE
.rf13m_rom_isr : {} > RF13M_ROM_ISR type = DSECT
.jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */
.bslsignature : {} > BSLSIGNATURE /* BSL Signature */
.jtagpassword /* JTAG Password */
.bss : {} > RAM /* Global & static vars */
.data : {} > RAM /* Global & static vars */
.TI.noinit : {} > RAM /* For #pragma noinit */
.stack : {} > RAM (HIGH) /* Software system stack */
/* MSP430 Interrupt vectors */
.int00 : {} > INT00
.int01 : {} > INT01
.int02 : {} > INT02
.int03 : {} > INT03
.int04 : {} > INT04
RFPMM : { * ( .int05 ) } > INT05 type = VECT_INIT
PORT1 : { * ( .int06 ) } > INT06 type = VECT_INIT
SD_ADC : { * ( .int07 ) } > INT07 type = VECT_INIT
USCI_B0 : { * ( .int08 ) } > INT08 type = VECT_INIT
ISO : { * ( .int09 ) } > INT09 type = VECT_INIT
WDT : { * ( .int10 ) } > INT10 type = VECT_INIT
TIMER0_A1 : { * ( .int11 ) } > INT11 type = VECT_INIT
TIMER0_A0 : { * ( .int12 ) } > INT12 type = VECT_INIT
UNMI : { * ( .int13 ) } > INT13 type = VECT_INIT
SYSNMI : { * ( .int14 ) } > INT14 type = VECT_INIT
.reset : {} > RESET /* MSP430 Reset vector */
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
-l rf430frl152h.cmd
Thanks,
Anil
Yes.. I am using "MSP430 USB-Debug-interafce MSP-FET430UIF " for programming the card. please find below screen shot of settings and configuration. 
.
Hello Anil,
I mean the RF430FRL152HEVM GUI which needs a reader device as well like the formerly available TRF7970AEVM or now currently the DLP-7970ABP with the MSP-EXP430G2 LaunchPad.
The GUI is pictured here:
