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CC1310: Incorrect frequency

Part Number: CC1310

Hi Ti,

I am having an issue with the Frequency output of the CC1310.

I am using the 915 MHz band.

I have 2 CC1310 Launchpad boards that use the revision B chip and they always seem to work.

In CW mode they put out around 914.997 MHz.

I have some prebuilt modules with CC1310 Revision A chips.

Sometimes they work and sometimes they don't.

When they don't work, I have observed the CW output on a spectrum analyzer to be 914.957.

Do you know why they are putting out a signal 40 kHz lower than the dev boards?

Is it related to the Rev A vs Rev B chips or something else?

I am using the latest SmartRF studio with latest SDKs and the modulation format is selected using SmartRF studio using 50 kbps 2GFSK.

This may be unrelated, but I cannot find the lines to comment out under pOverrides in the SmartRF studio output as mentioned in the below link:

processors.wiki.ti.com/.../CC1310_rev_B_PCN_information

Thanks,

Nick

  • After further investigation, I might have identified the problem but it presents another issue.
    I came across the following post that specifies that the crystal load capacitor is probably the issue..

    e2e.ti.com/.../557734

    In the datasheet for the module, it specifies that a 9 pF capacitor is already installed.
    It further specifices that SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA should be set to 0x00 to correct for this.

    However this does not seem to have fixed it.
    I am also confused by the cap array tuning value in SmartRF studio.

    Do they both affect the crystal or does one override the other?

    Thanks,
    Nick
  • I have also tried setting SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA to a much larger value (both positive and negative).
    This does not seem to affect the frequency that the part puts out.

    Thanks,
    Nick
  • I should also mentioned that I have been able to get them to work by "hacking" the freqeuncy.

    If I set the frequency of the module to 915.040 MHz then everything works.
    Haven't come up with an explanation for the frequency error though.
  • - "This may be unrelated, but I cannot find the lines to comment out under pOverrides": For 50 kbps the settings are equal for both rev A and rev B. For all other settings the two lines has to be commented out as the wiki state.
    - When using SmartRF Studio, it is the settings set in this program that are used since the CCFG settings are not used.
    - Since your frequency is too low this indicate too high Cload. From your posts it's not clear if you have mounted external load caps or not? Which Cload are the xtal you are using spec'ed for? What is the delta in frequency you see if you set the cap array to min and max in SmartRF Studio?
  • Thanks for your swift reply.

    I am using SmartRF studio to generate settings but I am not controlling it via smartRF studio.
    I will try controlling it via smartRF studio right now and get back to you.
  • I tested it usign smartRF studio and I can confirm that settings cap array delta to -29 (0xE3) adjust the frequency appropriately.
    For some reason when I set SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA and SET_CCFG_MODE_CONF_XOSC_CAP_MOD this change does not occur.

    The datasheet for the module states that they have included a 9 pF load capacitor in the module and hence SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA must be changed. There is not much more info than that.

    At min setting -57 (0xC7), the resulting frequency is 915.077 MHz
    At max setting 10 (0x0A) , the resulting frequency is 914.943 MHz

    I guess my questions now are:
    Is SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA the correct setting, because it doesn't seem to do anything?
    Should I expect such a wide variation in frequency from the cap array tuning (ie can I set and forget the cap array value)?
  • Do you have a schematic or other information about the modules you are using?

    Could you post the section of the ccfg.c where you modify SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA and SET_CCFG_MODE_CONF_XOSC_CAP_MOD?
  • I do not have a schematic, but I will be asking for one after this.
    I have confirmed that the correct ccfg.c is being compiled by inserting an #error directive which gets noticed by the compiler.
    Below is the modification to ccfg.c.

    #ifndef SET_CCFG_MODE_CONF_XOSC_CAP_MOD
    #define SET_CCFG_MODE_CONF_XOSC_CAP_MOD 0x0 // Apply cap-array delta
    //#define SET_CCFG_MODE_CONF_XOSC_CAP_MOD 0x1 // Don't apply cap-array delta
    #endif

    #ifndef SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA
    //#error check we are compiling this
    #define SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA 0xE3 // Signed 8-bit value, directly modifying trimmed XOSC cap-array
    //#define SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA 0xFF // Signed 8-bit value, directly modifying trimmed XOSC cap-array
    #endif
  • Did you have an answer for why SET_CCFG_MODE_CONF_XOSC_CAP_MOD and SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA are not changing the capacitance in my project?

  • I have checked ccfg and it seems correct (see the oxE3 in memory browser below).

    Still not sure why frequency not changing when I run my code but changes under smart rf studio.

  • Did you manage to get it to work?

    I did the same as you (changed the cap array in CCFG) and I got the frequency to change.

    Note that for the new SDKs you can add the lines you need to the ccfg.c file in the project and leave the ccfg.c file under startup files unchanged.
  • I haven't managed to get it working yet.

    I am still using a frequency offset in my code to make it work and continuing with other parts of the system.

    It occurred to me that it might be related to using a bootloader that jumps into the main app.

    Perhaps I need to set the ccfg in the bootloader rather than the main app?

    Perhaps once the bootloader has run we are unable to reset ccfg.

    As you saw from my screenshot, the ccfg memory addresses seem to be set correctly.