flash verification fails after programming over EHIF

I have what seems to be the exact same problem described by Jonas.

Here's my exact situation....

I'm using the SPI port to program a CC8520 device, in-circuit. The device will program successfully when using the PurePath Wireless Configurator but not when using EHIF firmware in my production test and programming fixture. The SPI port is running at 2Mbps data rate.

Here's what's happening.....

1) I am able to do a bootload reset
2) I get a successful BL_UNLOCK_SPI (0x8020 status word returned)
3) Successful BL_FLASH_MASS_ERASE (0x8003 status word returned)
4) Successful BL_FLASH_PAGE_PROG for all 32 pages (0x800b status word returned on each page)
5) When doing the BL_FLASH_VERIFY I receive the command failed due to checksum mismatch (0x800f). I notice that the checksum is different each time I run the FLASH programming loop.

Here is a snipet of my code:

uint8 PrgCc85x0(FIL * pFile)
{
uint8 prg_cc85x0_err = NO_CC85X0_PRG_ERR;

uint16 i;

set_img_size = FALSE;
// do a bootloader reset on the CC85x0
prg_cc85x0_err = BootReset();

// wait for the device to be ready for an unlock command
uint16 sw = 0x0000;
uint8 rdy_timeout = FALSE;

while(sw != WAIT_BL_UNLOCK)
{
spiB1SendDataBuf[0] = GET_STATUS;
spiB1SendDataBuf[1] = 0;
// select the cc85x0 uut
SPI_CS_Assert(CS_CC85x0);
StartSpiB1Write(2, 2);
uint16 timeout = GetSystemTicks() + CC85X0TIMEOUT;

// wait for data to transmit to cc85x0
while(GetSpiB1Active())
if(timeout == GetSystemTicks())
rdy_timeout = TRUE;

SPI_CS_Deassert(CS_CC85x0);

if(rdy_timeout)
prg_cc85x0_err = UNLOCK_CC85X0_ERROR;

// now check the cc85x0 status if no timeout error
else
{
sw = spiB1RcvDataBuf[0];
sw <<= 8;
sw |= spiB1RcvDataBuf[1];
}
}

// unlock the CC85x0 FLASH
if(prg_cc85x0_err == NO_CC85X0_PRG_ERR)
{
prg_cc85x0_err = BL_UnlockCc85x0Spi();
}

if(prg_cc85x0_err == NO_CC85X0_PRG_ERR)
{
prg_cc85x0_err = BL_FlashMassEraseCc85x0();
}

// program the CC85x0 FLASH with the file data
if(prg_cc85x0_err == NO_CC85X0_PRG_ERR)
{
// write to each flash page
for(i = 0; (i < 32) && (prg_cc85x0_err == NO_CC85X0_PRG_ERR); ++i)
{
// write a page of data to the start
// of the available data RAM area
SetCc85x0RamAddr(0x6000);
WriteCc85x0PrgData(0x400, pFile);

// now program the page from ram to flash
prg_cc85x0_err = BL_PrgCc85x0FlashPg(0x6000, 0x8000 + (i * 0x400));
}
}

// verify the CC85x0 FLASH
if(prg_cc85x0_err == NO_CC85X0_PRG_ERR)
{
fLCD_print(0, UutCC85x0Verifying);
fLCD_display();
prg_cc85x0_err = BL_VerifyCc85x0FlashPg(pFile);
}

return(prg_cc85x0_err);
}

Aside from reading the program data from a file on an sd card, the called functions are written like the EHIF code examples.

Here's some more information....

After I've supposedly programmed the CC8520 I wrote a routine to read the chip info. Here's what was read:

family id: 0x2505

silicon rev: 0x20

rom type: 0xb007

reom rev: 0x0200

fw type: 0xf355

fw rev: 0x41
fw_patch 0xea

fw image size: 0xffff8d76

chip id: 0x8520

The same chip programmed via the PurePath Wireless Configurator:

family id: 0x2505

silicon rev: 0x20

rom type: 0xb007

reom rev: 0x0200

fw type: 0x2505

fw rev: 0x12
fw_patch 0x02

fw image size: 0x00007bfc

chip id: 0x8520

After erasing the device:

amily id: 0x2505

silicon rev: 0x20

rom type: 0xb007

reom rev: 0x0200

fw type: 0xffff

fw rev: 0xff
fw_patch 0xff

fw image size: 0xffffffff

chip id: 0x8520

Any insight into this is greatly appreciated.

~Denis

OK, I seem to have found my problem. I was running the spi clock at 2Mbps and got the above results. However, when I changed my spi clock to 9Mbps, the CC8520 programmed and verified correctly. I didn't find any information in the literature that indicated the higher clock rate was needed and assumed 2Mbps would be good for debug purposes, especially since the spi interface specification gave 0 as the minimum parameter (I suppose the timing can be derived from using the spi only to do a bootloader reset timing requirements, but I'll let that exercise go to someone else).

Hopefully this information will help someone in the future.

~Denis