Get Connected: Data aggregation using a general purpose SerDes

Other Parts Discussed in Post: TLK10022

Welcome back to the Get Connected blog series here on Analog Wire! In my previous Get Connected blog, we reviewed the benefits of implementing equalization in high-speed serial links that are prone to signal integrity problems. In this post, I will be discussing the concept of using a general-purpose SerDes to aggregate multiple data inputs from different sources for high-speed transmission in short-reach or long-haul applications.

Over time, the need for higher data throughput has grown exponentially, but from a system level the amount of throughput is limited by the physical medium used for data transmission and the high-speed ports that a design supports. For example, if you have to move N Gigabit Ethernet links from one location to another, you are bound by the maximum throughput of a GigE link (1.25Gbps) and the typical transmission distance of 100 meters that Ethernet cabling supports. There are many variants that can be implemented in a GigE design to work around the system-level limitations, but for argument’s sake let’s agree that the parameters above are representative of a typical system.

In order to get your payload from point A to point B, N cables need to be pulled to carry the payload, while point A and point B also need to be within some reasonable distance of each other to avoid data loss. What if you have to transmit your payload across a campus where the distance can exceed one or two kilometers? Solving this problem can be very costly, as cabling is expensive and repeaters may need to be implemented at several points along the bus to deal with signal integrity issues.

TI recently released two general-purpose aggregation devices that deal with such an issue head-on to help reduce overall system complexity and cost. The TLK10022 and the TLK10081 are multi-channel, high-speed SerDes devices that allow for 4 and 8 lanes of low-speed data, respectively, to be aggregated and de-aggregated in the same package to and from one high-speed serial link. The high-speed portion of the SerDes can be configured to support multiple output frequencies, with the maximum throughput being 10Gbps. The low-speed portion of the SerDes can also be configured to operate at many different frequencies and ultimately determines the high-speed output frequency. Figure 1 below depicts a system-level block diagram using the TLK10022:

Figure 1: System-level block diagram using the TLK10022

If we revisit our Gigabit Ethernet example from earlier, it is easy to see that the system complexity and overall system cost is reduced by implementing the TLK10022 aggregation solution. The system cost is reduced dramatically as N cables now become one electrical or optical link, and the system complexity is simplified as N cables are reduced and the need to implement repeaters disappears.

Why stop at Gigabit Ethernet, though? With these devices, the aggregation style in the system makes it possible to aggregate any type of data within the bandwidth limitations of the device. The first aggregation style would be applicable in Ethernet applications: byte interleave mode. In this mode, the aggregation device is looking for 8b10b encoded data on its low-speed inputs. The aggregation core takes the 10-bit words and multiplexing the signals out of the high-speed portion of the IC. The second option for aggregation is bit interleave mode. In this mode, the device works in a round-robin format, taking 1 bit at a time off of each of the low-speed lanes, while again multiplexing the signals out of the high-speed portion if the IC. There is no pre-processing of the data with the aggregation device, it simply multiplexes the incoming data out of the high-speed portion of the IC at an aggregate faster speed. The receiving de-aggregation device is configured in the same manner as the aggregation device, making the data transfer complete.

Recently, the TLK10022 was demonstrated at the electronica trade fair in Munich, Germany. In this demo, the TLK10022 was used to aggregate and de-aggregate four HD-SDI signals running at 1.485Gbps. The four signals were aggregated into a 5.94Gbps optical link, then de-aggregated and shown on four independent monitors. This demo showcased the power and versatility behind TI’s aggregation technology. Watch a video about the demo here. Figure 2 below also shows an image of this HD-SDI demo from electronica. 

Figure 2: Gigabit video aggregation

For more information on specific aggregation application solutions, please visit the High Speed Interface Forum in the TI E2E™ Community to check out existing posts from engineers already using TI interface products or create a new thread to address your specific application. If you are not connected, you can get connected with one of the broadest interface portfolios in the industry.

Please watch for my next post in the Get Connected series, where we will discuss using differential transceivers in unconventional applications. Leave your comments in the section below if you’d like to hear more about anything mentioned in this post or if there is an interface topic you'd like to see us tackle in the future!

And be sure to check out the full Get Connected series!