*THS4520 Wideband, Low Noise, Low Distortion Fully Differential Amplifier with Rail-to-Rail Output * REV. A - Created 10/30/06 X-ramus2@ti.com * * * NOTES: * 1- This macromodel predicts well: DC, small-signal AC, noise, * , and transient performance under a wide range * of conditions. * 2- This macromodel does not predict well: distortion * (harmonic, intermod, diff. gain & phase, ...), * temperature effects, board parasitics, differences * between package styles, and process changes * 3- For some simulators the subckt for the F statement need to be placed * inside the ends statement followed by carriage return * 4- Known Problems: - Do not simulate Iout * * |-------------------------------------------------------------| * | This macro model is being supplied as an aid to | * | circuit designs. While it reflects reasonably close | * | similarity to the actual device in terms of performance, | * | it is not suggested as a replacement for breadboarding. | * | Simulation should be used as a forerunner or a supplement | * | to traditional lab testing. | * | | * | Neither this library nor any part may be copied without | * | the express written consent of Texas Instruments Corp. | * |-------------------------------------------------------------| * * CONNECTIONS: Changes order of pins compareed to original version * NonInverting Input * | Inverting Input * | | Positive Supply * | | | Negative Supply * | | | | Negative Output * | | | | | Positive Supply * | | | | | | Common Mode Input * | | | | | | | * | | | | | | | * | | | | | | | *$ .SUBCKT THS4520_Model In+ In- Vs+ Vs- Out- Out+ CM .PARAM Raol = 1.2k .PARAM Lp = 30n C_C1 Vmid N0001 99.47n R_R3 N0002 N0001 {Raol} R_R5 N0001 Vmid 1T E_E2 N0003 Vmid N0001 Vmid 1 R_R7 N0003 N0004 8 L_L1 N0004 N0005 0.5nH C_C3 Vmid N0005 250p R_R1 N0007 N0006 30 R_R2 N0009 N0008 30 E_E1 N0002 N0010 N0007 N0009 1.02MEG G_G1 Vs+ N0012 Vs+ N0011 0.7m E_E10 N0014 Vmid N0013 Vmid 125u R_R4 N0010 N0015 {Raol} E_E3 N0016 Vmid N0015 Vmid 1 R_R8 N0016 N0017 8 L_L2 N0017 N0018 0.5nH C_C4 N0018 Vmid 250p C_C2 N0015 Vmid 99.47n R_R6 Vmid N0015 1T C_C5 Vmid N0019 1p L_L5 CM N0020 900nH R_R9 N0020 N0019 900 E_E6 N0021 N0014 N0019 Vmid 1 E_U2 Out- N0021 VALUE={LIMIT(V(N0005,Vmid)*1,V(N0022,Vmid),V(N0023,Vmid))} V_V12 N0022 Vs- DC 0.25 R_RV12 N0022 Vmid 1e6 E_U3 Out+ N0021 VALUE={LIMIT(V(N0018,Vmid)*1,V(N0024,Vmid),V(N0025,Vmid))} V_V14 N0024 Vs- DC 0.25 R_RV14 N0024 Vmid 1e6 V_V13 Vs+ N0025 DC 0.25 R_RV13 N0025 Vmid 1e6 E_E11 N0013 Vmid POLY(2) In- Vmid In+ Vmid 0 0.5 0.5 Q_Q2 N0009 In- N0026 NPN8 1 E_E4 Vmid Vs- Vs+ Vs- 0.5 V_V6 N0011 Vs- DC 3V V_V7 N0012 Vs- DC 0V I_I5 Vs+ Vs- DC 10.8mA Q_Q1 N0007 In+ N0026 NPN8 1 I_I2 Vs+ In+ DC 9.2uA I_I3 Vs+ In- DC 9uA L_L4 N0008 Vs+ {Lp} L_L3 N0006 Vs+ {Lp} V_V11 Vs+ N0023 DC 0.25 R_RV11 N0023 Vmid 1e6 I_I4 CM Vs- DC 0.6uA X_S2 Vs+ Vs- N0027 Vs- THS4520_Model_S2 R_R19 N0027 N0026 1m .MODEL NPN8 NPN + IS = 7.604E-18 BF = 1.570E+02 NF = 1.000E+00 VAF= 7.871E+01 + IKF= 3.975E-02 ISE= 3.219E-14 NE = 2.000E+00 BR = 7.614E-01 + NR = 1.000E+00 VAR= 1.452E+00 IKR= 8.172E-02 ISC= 7.618E-21 + NC = 1.847E+00 RB = 1.060E+02 IRB= 0.000E+00 RBM= 2.400E+00 + RE = 2.520E+00 RC = 1.270E+02 CJE= 1.120E-13 VJE= 7.591E-01 + MJE= 5.406E-01 TF = 1.213E-11 XTF= 2.049E+00 VTF= 1.813E+00 + ITF= 4.293E-02 PTF= 0.000E+00 CJC= 8.208E-14 VJC= 6.666E-01 + MJC= 4.509E-01 XCJC=8.450E-02 TR = 4.000E-11 CJS= 1.160E-13 + VJS= 5.286E-01 MJS= 4.389E-01 XTB= 1.022E+00 EG = 1.120E+00 + XTI= 1.780E+00 KF = 3.500E-16 AF = 1.000E+00 FC = 8.273E-01 .ENDS THS4520_Model *$ .subckt THS4520_Model_S2 1 2 3 4 S_S2 3 4 1 2 _S2 RS_S2 1 2 1G .MODEL _S2 VSWITCH Roff=0.166748625431493 Ron=932.790061092598 + Voff=-8.102659644524 Von=6.08261917857915 .ends THS4520_Model_S2 *$