// Title: DP83867 PRBS test
// Company: Texas Instruments
// Location: Santa Clara, CA
// Developer: Ross Pimentel
// Date: December 23, 2014
// Force DUT 100Mbps, BIST, External Loop
// Texas Instruments

begin

//delay 100
001f 8000	// restart core
0000 2100	// force 100Mbps, full-duplex
0010 5008	// 5008 - mdi , 5028 - mdix

// Enable BIST mode
//echo BIST 
0016 f008	// use termination outside RJ45//Continuous PRBS, Enable checker, Enable PRBS, Transmit 64 packets

001f 4000
//delay 200

// loop 5
// Reads GEN_STATUS
// NOTE: First read clears LH, Second read has actual status
// Value should be 0A40, PBRS checker locked and sync
0017
0017
// NOTE: First read clears LL, Second read has actual status
//0001 //bit 2 will give indication if we have link fails
//0001
0072 3 // lock & clear PRBS counters (byte 0x71 and erro 0x72) counters
0071 // rd byte counter to observe bytes are indeed received 
0072 // rd errors counter. should read 0
// endloop

0000

end