MEMORY { PAGE 0 : RAMM0 : origin = 0x00000128, length = 0x000002D8 RESET : origin = 0x003FFFC0, length = 0x00000002 RAMLS_Prog : origin = 0x00008000, length = 0x00001800 // RAMLS0 : origin = 0x00008000, length = 0x00000800 cla 程序空间 // RAMLS1 : origin = 0x00008800, length = 0x00000800 // RAMLS2 : origin = 0x00009000, length = 0x00000800 // RAMGS_Prog : origin = 0x0000C000, length = 0x00003FF8 RAMGS_Prog : origin = 0x0000D000, length = 0x00002FF8 // RAMGS1 : origin = 0x0000D000, length = 0x00001000 // RAMGS2 : origin = 0x0000E000, length = 0x00001000 // RAMGS3 : origin = 0x0000F000, length = 0x00000FF8 // SECURE_ROM : origin = 0x003F2000, length = 0x00006000 // BOOTROM : origin = 0x003F8000, length = 0x00007FC0 /* Flash sectors */ /* BANK 0 */ // BEGIN : origin = 0x00080000, length = 0x00000004 FLASH_BOOT : origin = 0x080004, length = 0x003FFC // FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE // FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 // FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 // FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 BEGIN : origin = 0x084000, length = 0x000004 AppFlagW : origin = 0x084004, length = 0x000004 //App程序存在标志 FLASH_APP : origin = 0x084008, length = 0x01AFF4 /* on-chip Flash */ FLASHEND : origin = 0x09EFFC, length = 0x000004 //APP程序结束标志 // FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 // FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 // FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 // FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 // FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 // FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 // FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 // FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 // FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 // FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 // FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 // FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* BANK 1 */ // FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 // FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 // FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 // FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 // FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 // FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 // FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 // FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 // FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 // FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 // FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 // FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 // FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 // FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 // FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 // FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* BANK 2 */ FLASH_BANK2_SEC0 : origin = 0x0A0000, length = 0x001000 FLASH_BANK2_SEC1 : origin = 0x0A1000, length = 0x001000 FLASH_BANK2_SEC2 : origin = 0x0A2000, length = 0x001000 FLASH_BANK2_SEC3 : origin = 0x0A3000, length = 0x001000 FLASH_BANK2_SEC4 : origin = 0x0A4000, length = 0x001000 FLASH_BANK2_SEC5 : origin = 0x0A5000, length = 0x001000 FLASH_BANK2_SEC6 : origin = 0x0A6000, length = 0x001000 FLASH_BANK2_SEC7 : origin = 0x0A7000, length = 0x001000 FLASH_BANK2_SEC8 : origin = 0x0A8000, length = 0x001000 FLASH_BANK2_SEC9 : origin = 0x0A9000, length = 0x001000 FLASH_BANK2_SEC10 : origin = 0x0AA000, length = 0x001000 FLASH_BANK2_SEC11 : origin = 0x0AB000, length = 0x001000 FLASH_BANK2_SEC12 : origin = 0x0AC000, length = 0x001000 FLASH_BANK2_SEC13 : origin = 0x0AD000, length = 0x001000 FLASH_BANK2_SEC14 : origin = 0x0AE000, length = 0x001000 FLASH_BANK2_SEC15 : origin = 0x0AF000, length = 0x000FF0 // FLASH_BANK0_SEC15_RSVD : origin = 0x0AFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */ PAGE 1 : BOOT_RSVD : origin = 0x00000002, length = 0x00000126 App2Boot : origin = 0x00000400, length = 0x00000010 RAMM1 : origin = 0x00000410, length = 0x000003E8 // RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */ RAMLS_Data : origin = 0x00009800, length = 0x00001000 // RAMLS3 : origin = 0x00009800, length = 0x00000800 // cla 数据空间 // RAMLS4 : origin = 0x0000A000, length = 0x00000800 // RAMGS_Data : origin = 0x0000A800, length = 0x00001800 RAMGS_Data : origin = 0x0000A800, length = 0x00002800 // RAMLS5 : origin = 0x0000A800, length = 0x00000800 //cpu 数据空间 // RAMLS6 : origin = 0x0000B000, length = 0x00000800 // RAMLS7 : origin = 0x0000B800, length = 0x00000800 // RAMGS0 : origin = 0x0000C000, length = 0x00001000 CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080 CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080 } SECTIONS { codestart : > BEGIN PAGE = 0 .text : > FLASH_APP, PAGE = 0 .cinit : > FLASH_APP, PAGE = 0 .switch : > FLASH_APP, PAGE = 0 .stack : > RAMM1 PAGE = 1 // .pinit : > FLASH_APP, PAGE = 0, ALIGN(4) // .ebss : > RAMGS_Data, PAGE = 1 // .esysmem : > RAMGS_Data, PAGE = 1 // .cio : > RAMGS_Prog, PAGE = 0, ALIGN(4) // .econst : > FLASH_APP, PAGE = 0, ALIGN(4) #if defined(__TI_EABI__) .bss : > RAMGS_Data, PAGE = 1 .const : > FLASH_APP, PAGE = 0 .data : > RAMGS_Data, PAGE = 1 .init_array : > FLASH_APP, PAGE = 0 .bss:output : > RAMGS_Data, PAGE = 1 .bss:cio : > RAMGS_Data, PAGE = 1 .sysmem : > RAMGS_Data, PAGE = 1 #else .pinit : > FLASH_APP, PAGE = 0 .econst : > FLASH_APP, PAGE = 0 .cio : > RAMGS_Prog, PAGE = 0 .ebss : > RAMGS_Data, PAGE = 1 .esysmem : > RAMGS_Data, PAGE = 1 #endif AppFlag : > AppFlagW PAGE = 0 /* XW */ flashEnd : > FLASHEND PAGE = 0 App2BootData : > App2Boot PAGE = 1 .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */ CLA1mathTables : > RAMLS_Data, PAGE = 1 #if defined(__TI_EABI__) .TI.ramfunc : LOAD = FLASH_APP, RUN = RAMGS_Prog LOAD_START(RamfuncsLoadStart), LOAD_SIZE(RamfuncsLoadSize), LOAD_END(RamfuncsLoadEnd), RUN_START(RamfuncsRunStart), RUN_SIZE(RamfuncsRunSize), RUN_END(RamfuncsRunEnd), ALIGN(4) #else .TI.ramfunc : LOAD = FLASH_APP, RUN = RAMGS_Prog LOAD_START(_RamfuncsLoadStart), LOAD_SIZE(_RamfuncsLoadSize), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), RUN_SIZE(_RamfuncsRunSize), RUN_END(_RamfuncsRunEnd), ALIGN(4) #endif /* #if defined(__TI_EABI__) .TI.ramfunc : LOAD = FLASH_APP, RUN = RAMGS_Prog LOAD_START(RamConstLoadStart), LOAD_SIZE(RamConstLoadSize), LOAD_END(RamConstLoadEnd), RUN_START(RamConstRunStart), RUN_SIZE(RamConstRunSize), RUN_END(RamConstRunEnd), PAGE = 0, ALIGN(4) #else .TI.ramfunc : LOAD = FLASH_APP, RUN = RAMGS_Prog LOAD_START(_RamConstLoadStart), LOAD_SIZE(_RamConstLoadSize), LOAD_END(_RamConstLoadEnd), RUN_START(_RamConstRunStart), RUN_SIZE(_RamConstRunSize), RUN_END(_RamConstRunEnd), PAGE = 0, ALIGN(4) #endif */ //Load tables to Flash and copy over to RAM // #if defined(__TI_EABI__) CLA1mathTables : LOAD = FLASH_APP, RUN = RAMLS_Data, RUN_START(CLA1mathTablesRunStart), LOAD_START(CLA1mathTablesLoadStart), LOAD_SIZE(CLA1mathTablesLoadSize), PAGE = 1 #else CLA1mathTables : LOAD = FLASH_APP, RUN = RAMLS_Data, RUN_START(_CLA1mathTablesRunStart), LOAD_START(_CLA1mathTablesLoadStart), LOAD_SIZE(_CLA1mathTablesLoadSize), PAGE = 1 #endif #if defined(__TI_EABI__) /* CLA specific sections */ Cla1Prog : LOAD = FLASH_APP, RUN = RAMLS_Prog, LOAD_START(Cla1ProgLoadStart), RUN_START(Cla1ProgRunStart), LOAD_SIZE(Cla1ProgLoadSize), PAGE = 0, ALIGN(4) #else /* CLA specific sections */ Cla1Prog : LOAD = FLASH_APP, RUN = RAMLS_Prog, LOAD_START(_Cla1ProgLoadStart), RUN_START(_Cla1ProgRunStart), LOAD_SIZE(_Cla1ProgLoadSize), PAGE = 0, ALIGN(4) #endif /****** #if defined(__TI_EABI__) .const_cla : LOAD = FLASH_APP, RUN = RAMLS_Prog, RUN_START(Cla1ConstRunStart), LOAD_START(Cla1ConstLoadStart), LOAD_SIZE(Cla1ConstLoadSize), PAGE = 0, ALIGN(4) #else .const_cla : LOAD = FLASH_APP, RUN = RAMLS_Prog, RUN_START(_Cla1ConstRunStart), LOAD_START(_Cla1ConstLoadStart), LOAD_SIZE(_Cla1ConstLoadSize), PAGE = 0, ALIGN(4) #endif *******/ Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW , PAGE = 1 CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1 .scratchpad : > RAMLS_Data, PAGE = 1 .bss_cla : > RAMLS_Data, PAGE = 1 .const_cla : > RAMLS_Data, PAGE = 1 Cla1DataRam : > RAMLS_Data, PAGE = 1 cla_shared : > RAMLS_Data, PAGE = 1 //Cla1Data : > RAMLS_Data, PAGE = 1 CLADataLS1 : > RAMLS_Data, PAGE = 1 /* Allocate IQ math areas: */ IQmath : > FLASH_APP, PAGE = 0, ALIGN(4) /* Math Code */ IQmathTables : > FLASH_APP, PAGE = 0, ALIGN(4) } /* //=========================================================================== // End of file. //=========================================================================== */