//---------------------------------------------
   // ePWM(n) init.  Note EPWM(n) is the Master
    (*ePWM[n]).TBCTL.bit.PRDLD = TB_SHADOW;            // set Shadow load
    (*ePWM[n]).TBPRD = period-1;                       // 
    (*ePWM[n]).CMPA.bit.CMPA = period / 2;             // set duty 50% initially
    (*ePWM[n]).CMPA.bit.CMPAHR = (1 << 8);             // initialize HRPWM extension
    (*ePWM[n]).CMPB.bit.CMPB = period / 2;             // set duty 50% initially
    (*ePWM[n]).CMPB.all |= 1;
    (*ePWM[n]).TBPHS.all = 0;
    (*ePWM[n]).TBCTR = 0;

    (*ePWM[n]).TBCTL.bit.CTRMODE = TB_COUNT_UP;        // Select up count mode
    (*ePWM[n]).TBCTL.bit.PHSEN = TB_DISABLE;
    (*ePWM[n]).TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; 	   //used to sync EPWM(n+1) "down-stream"

    (*ePWM[n]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
    (*ePWM[n]).TBCTL.bit.CLKDIV = TB_DIV1;              // TBCLK = SYSCLKOUT
    (*ePWM[n]).TBCTL.bit.FREE_SOFT = 11;

    (*ePWM[n]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;      // LOAD CMPA on CTR = 0
    (*ePWM[n]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
    (*ePWM[n]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    (*ePWM[n]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;


    (*ePWM[n]).AQCTLA.bit.ZRO = AQ_SET;               // PWM toggle high/low
    (*ePWM[n]).AQCTLA.bit.CAU = AQ_CLEAR;
    (*ePWM[n]).AQCTLB.bit.ZRO = AQ_SET;
    (*ePWM[n]).AQCTLB.bit.CBU = AQ_CLEAR;

    // DeadBand Control Register
    (*ePWM[n]).DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    (*ePWM[n]).DBCTL.bit.POLSEL = DB_ACTV_HIC; 			// Active Hi Complimentary
    (*ePWM[n]).DBRED = ((period/25) + 5);
    (*ePWM[n]).DBFED = ((period/25) + 5);

    EALLOW;
    (*ePWM[n]).HRCNFG.all = 0x0;
    (*ePWM[n]).HRCNFG.bit.EDGMODE = HR_BEP;          // MEP control on both edges
    (*ePWM[n]).HRCNFG.bit.CTLMODE = HR_CMP;          // CMPAHR and TBPRDHR HR control
    (*ePWM[n]).HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;	 // load on CTR = 0
    (*ePWM[n]).HRCNFG.bit.EDGMODEB = HR_BEP;         // MEP control on both edges
    (*ePWM[n]).HRCNFG.bit.CTLMODEB = HR_CMP;         // CMPBHR and TBPRDHR HR control
    (*ePWM[n]).HRCNFG.bit.HRLOADB  = HR_CTR_ZERO;	 // load on CTR = 0
    (*ePWM[n]).HRCNFG.bit.AUTOCONV = 1;              // Enable autoconversion for HR period

    (*ePWM[n]).HRPCTL.bit.TBPHSHRLOADE = 1;          // Enable TBPHSHR sync (required for updwn count HR control)
    (*ePWM[n]).HRPCTL.bit.HRPE = 1;                  // Turn on high-resolution period control.

    EDIS;
    //---------------------------------------------
    // ePWM(n+1) init.  EPWM(n+1) is a slave
    (*ePWM[n+1]).TBCTL.bit.PRDLD = TB_SHADOW;          	 // set Shadow load
    (*ePWM[n+1]).TBCTL2.bit.PRDLDSYNC = 2;          	 // Shadow to Active Load of TBPRD occurs only when a SYNC is received
    (*ePWM[n+1]).TBPRD = period-2;                       // PWM frequency = 1 / period
    (*ePWM[n+1]).CMPA.bit.CMPA = period / 2;             // set duty 50% initially
    (*ePWM[n+1]).CMPA.bit.CMPAHR = (1 << 8);             // initialize HRPWM extension
    (*ePWM[n+1]).CMPB.bit.CMPB = period / 2;             // set duty 50% initially
    (*ePWM[n+1]).CMPB.all |= 1;
    (*ePWM[n+1]).TBPHS.all = 0;
    (*ePWM[n+1]).TBCTR = 0;

    (*ePWM[n+1]).TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Select up-down count mode
	(*ePWM[n+1]).TBCTL.bit.PHSEN = TB_ENABLE;
    (*ePWM[n+1]).TBCTL.bit.SYNCOSEL = TB_SYNC_IN; 		 // Sync "flow through" mode

    (*ePWM[n+1]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
    (*ePWM[n+1]).TBCTL.bit.CLKDIV = TB_DIV1;              // TBCLK = SYSCLKOUT
    (*ePWM[n+1]).TBCTL.bit.FREE_SOFT = 11;

    (*ePWM[n+1]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;      // LOAD CMPA on CTR = 0
    (*ePWM[n+1]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
    (*ePWM[n+1]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    (*ePWM[n+1]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;


    (*ePWM[n+1]).AQCTLA.bit.ZRO = AQ_SET;               // PWM toggle high/low
    (*ePWM[n+1]).AQCTLA.bit.CAU = AQ_CLEAR;
    (*ePWM[n+1]).AQCTLB.bit.ZRO = AQ_SET;
    (*ePWM[n+1]).AQCTLB.bit.CBU = AQ_CLEAR;

    // DeadBand Control Register
    (*ePWM[n+1]).DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    (*ePWM[n+1]).DBCTL.bit.POLSEL = DB_ACTV_HIC;		 // Active Hi Complimentary
    (*ePWM[n+1]).DBRED = ((period/25) + 5);
    (*ePWM[n+1]).DBFED = ((period/25) + 5);

    EALLOW;
    (*ePWM[n+1]).HRCNFG.all = 0x0;
    (*ePWM[n+1]).HRCNFG.bit.EDGMODE = HR_BEP;          // MEP control on both edges
    (*ePWM[n+1]).HRCNFG.bit.CTLMODE = HR_CMP;          // CMPAHR and TBPRDHR HR control
    (*ePWM[n+1]).HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;	   // load on CTR = 0
    (*ePWM[n+1]).HRCNFG.bit.EDGMODEB = HR_BEP;         // MEP control on both edges
    (*ePWM[n+1]).HRCNFG.bit.CTLMODEB = HR_CMP;         // CMPBHR and TBPRDHR HR control
    (*ePWM[n+1]).HRCNFG.bit.HRLOADB  = HR_CTR_ZERO;    // load on CTR = 0
    (*ePWM[n+1]).HRCNFG.bit.AUTOCONV = 1;              // Enable autoconversion for HR period

    (*ePWM[n+1]).HRPCTL.bit.TBPHSHRLOADE = 1;          // Enable TBPHSHR sync (required for updwn count HR control)
    (*ePWM[n+1]).HRPCTL.bit.HRPE = 1;                  // Turn on high-resolution period control.

    EDIS;

    //---------------------------------------------