_irq void i2c_write()
{
	unsigned char status = 0 ;
	
	status = I2C0STAT ;

	status1[s_i++] = status;
	IOCLR0 |= ( 1 << 25 );
	
		
	
	switch(status)
	{
		// start condition has been tx , slave add + w will be tx , an ack will be recived
		case 0x08 :   I2C0DAT = 0xAE ;   //slave add
		              I2C0CONCLR = 0x20 ;
			      I2C0CONCLR = 0x08 ; //clear the si flag
			      temp_debug = 1;
			      break;
		
		//repetated start condition is tx
		case 0x10 :  I2C0CONCLR = 0x08 ; //clear the si flag
			     I2C0CONCLR = 0x20 ;
			     temp_debug = 2 ;
			     break;
		
		//slave add+ w has been tx , ack has been recived , send first byte data
		case 0x18 :  I2C0DAT = 0x00 ;     // set  reg add
			     I2C0CONCLR = 0x08 ;  //clear the si flag
			     temp_debug = 3 ;
			     break;
		
		// 0x20  :-   slave add + w has been tx , NACK recived. send stop bit
		// 0x30  :-   data byte tx , not ack recived
		// 0x38  :-   arbitration lost
		case 0x20 : case 0x30 : case 0x38 :
				 I2C0CONSET = 0x10;          // set STO bit
				 I2C0CONCLR = 0x08 ;        //clear the si flag
				 temp_debug = 4 ;
				 break;
		
		//data byte is tx , ack is recived . send stop condition
		case 0x28 :   i2c_txcomplete++ ;
			      if( i2c_txcomplete == 1 )
			      {
				 I2C0DAT = 176 ;          // set wiper reg value
				 I2C0CONCLR = 0x08 ;        //clear the si flag	
				// ds_i = s_i ;
			      }
			      else
			      {
				temp_debug = 6 ;
				I2C0CONSET = 0x10;          // set STO bit
				I2C0CONCLR = 0x08 ;        //clear the si flag	
			         ds_i = s_i ;
											
		               }
			 break;
								 
	}
	
	VICVectAddr = 0x0; 					// Acknowledge that ISR has finished execution
	
}