AIC3109_rset( 0, 0x00 );//Set PAGE_0
AIC3109_rset( 1, 0x80 );//Reset CODEC
AIC3109_rset( 1, 0x00 );//Clear Reset

//################ MCLK Selection ##################
	AIC3109_rset( 2, 0xAA );//ADC:48kHz(fsREF)/6=8kHz, DAC:48kHz(fsREF)/6=8kHz
//################ MCLK Selection ##################

AIC3109_rset( 3, 0x91 );//PLL Enable, PLL_Q(NoUse)=0010, Pll_P=1

//################ MCLK Selection ##################
	AIC3109_rset( 4, 0x30 );//PLL_J=001000(48), bit1=bit0=0 fs(REF)=256k x K(=J.D) x R / 2048 x P <- K=48, R=8, P=1, then fs(REF)=48k
//################ MCLK Selection ##################

AIC3109_rset( 5, 0x00 );//PLL_D=00000000(K=J.D Fraction.0.9999)
AIC3109_rset( 6, 0x00 );//PLL_D=000000(K=J.D Fraction 0.9999), bit1=bit0=00

//################ MCLK Selection ##################
	AIC3109_rset( 7, 0x08 );//bit7=0-> fsREF=48kHz, DAC_Dual_Rate_Ctrl=Disable, DAC_DATA_Path_Ctrl_A=Disable, DAC_DATA_Path_Ctrl_B=01(LeftCH), bit2�`bit0=0
//################ MCLK Selection ##################

AIC3109_rset( 8, 0x00 );//BCLKtoIn(=SlaveMode), WCKtoIn(=SlaveMode), SO<-Drv_NoChangeToHiImp, BCLK/WCLK_Drv_NoChangeToHiImp, bit3-bi0=0

AIC3109_rset( 9, 0x00 );//bit7-bit6=00(=I2S_Mode), bit5-bit4=00(=16bit), BCLK_Rate=0, DAC_ReSync=0, ADC_ReSync=0, Re_SyncMode=0
AIC3109_rset( 10, 0x00 );//I2S_SlotOFFSET=0

AIC3109_rset( 11, 0x08 );//bit7->ADC_OVF_FLG, bit6=0(reserved), bit5->DAC_OVF_FLG, bit4=(reserved), bit3-0:PLL_R=1000(=8)

//20241025	AIC3109_rset( 12, 0x10 );//ADC_HPF->100Hz, 
AIC3109_rset( 12, 0x00 );//ADC_HPF->Disable, 

AIC3109_rset( 15, 0x00 );//AGC_PGA_MUTE:OFF, 
AIC3109_rset( 16, 0x00 );//PGA_AUX Mute:OFF, 

AIC3109_rset( 19, 0x84 );//MIC/LINE_1_Input_Lev_CTRL for ADC PGA=Differentioal_Mode, ADC_ch_PWR_UP 

AIC3109_rset( 21, 0x08 );//MIC/LINE_2_Input_Lev_CTRL for ADC PGA, 

AIC3109_rset( 37, 0x80 );//bit7:DAC Power CTRL, 

AIC3109_rset( 42, 0x64 );//DAC_DrvPowerOn_Delay, Drv_RampUp_StepTiming_CTRL, 
AIC3109_rset( 43, 0x00 );//DAC_DigitalMute:OFF, DAC_DigVol_CTRL:0x00(0dB), 

AIC3109_rset( 82, 0x80 );//bit7:DAC_1_Output_Routing_CTRL, DAC_1_to_LEFT_LOP/M Anlg_VOL_CTRL->0dB, 

AIC3109_rset( 86, 0x0D );//LEFT_LOP/M_OutLevCTRL LEFT_LOP/M_Mute:OFF, 

//################ MCLK Selection ##################
	AIC3109_rset( 102, 0xA0 );//CLKDIV_IN->BCLK, //ADC -> DAC OK!
//################ MCLK Selection ##################