w 30 00 00
w 32 00 00
w 30 01 80
w 32 01 80
# reg 07 - codec datapath
# L-DAC plays DIN left data and R-DAC plays right one
w 30 07 8A
w 32 07 8A
# reg 08/09/10 - Audio Interface
# The first codec is the master (-256s) and the rest are slaves;
# DOUT all at tri-state when valid data is bit being sent
# DSP/16-bit mode with slot (n*2*16 bits, n=0, 1, 2, 3) delay
w 30 08 E0
w 32 08 20
w 30 09 48
w 32 09 48
w 30 0A 00
w 32 0A 80
##############
# Input Path
##############
# reg 17/18 - MIC3L for Left ADC and MIC3R for right ADC
w 30 11 0F F0
w 32 11 0F F0
# regs 25 - Power up MICBIAS to 2.5V for only one of EVMs
w 30 19 00
w 32 19 80
# reg 19/22 - power up ADC
w 30 13 7C
w 32 13 7C
w 30 16 7C
w 32 16 7C
# regs 15/16 - unmute ADC PGA and set to 0dB
w 30 0F 00 00
w 32 0F 00 00
##############
# Output Path
##############
# reg 14 - if at AC-Cap mode
#w 32 0E 80
# reg 42 - driver power ON Pop Control
w 30 2A 6C
w 32 2A 6C
######
# reg 37 DAC POWER CONTROL/ reg 38 HPCOM CONFIG
# Power up L and R DACs
# HPCOML/R as Headphone COM for Cap-Less mode
w 32 25 D0 08
# regs 43/44 - Unmute DAC L/R and set the Digital Volumes to 0dB
w 32 2B 00 00
######
# reg 47 - HPLOUT from Left DAC routed to HPLOUT @ 0dB
w 32 2F 80
# reg 51 - HPLOUT Level = 0dB, not muted, and powered up
w 30 33 04
w 32 33 0D
# reg 58 - HPLCOM Level, set HPLCOM at tri-state with PD
w 30 3A 04
w 32 3A 04
# reg 64 - HPROUT from Right DAC routed to HPROUT @ 0dB
# reg 65 - HPROUT Level = 0dB, not muted, and powered up
w 30 40 80 04
w 32 40 80 0D
# reg 72 - HPRCOM Level, set HPRCOM at tri-state with PD
w 30 48 04
w 32 48 04

*** DOUT_A should be tied to DOUT_B
*** Connect input to MIC3L_B on J13
*** Make sure MCLK, BCLK and WCLK are tied to both blocks