digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F00);//                          Page 0
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2158);//                          Reset
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2022);//             Reg 0 Master mode 
digitalWrite(ss, HIGH); 
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2140);//               Reg 1
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x22C4);//               Reg 2
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2430);//               Reg 4
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x25E0);//               Reg 5
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2700);//               Reg 7
digitalWrite(ss, HIGH);


digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F02);//                          Page 2
digitalWrite(ss, HIGH);

//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3000);//Reg 16    No. of SH intervals 1
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3100);//Reg 17    No. of SH intervals timing x1
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F03);//                          Page 3
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2040);// Reg. 0 SH 0 state length 200ns
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2100);// Reg. 0 SH 0 state length 200ns
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F05);//                          Page 5
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2001);// Reg. 0 SH1 high at 0 state 
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F06);//                          Page 6
digitalWrite(ss, HIGH);
//delay(5);

//set wave form duty cylcle 50%

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2003);// Reg. 0 PHIA 2 MSB=1
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x21FF);// Reg. 1 PHIA 8Bits=1
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x22FF);// Reg. 2 PHIA 8Bits=1
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x23E0);// Reg. 3 PHIA 8Bits for duty cycle 3 high 5 low
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2400);// Reg. 4 PHIA 8Bits for duty cycle low
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2500);// Reg. 5 PHIA 8Bits for duty cycle low
digitalWrite(ss, HIGH);
//delay(5);



digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2600);// Reg. 0 PHIB1 2 MSB=0
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF0FF);//Dummy Bits
SPI.transfer16(0x2700);// Reg. 1 PHIB 8Bits = 0
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2800);// Reg. 2 PHIB 8Bits for duty cycle low = 0
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x291F);// Reg. 3 PHIB 8Bits for duty cycle 3 low=0 5 high=1
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2AFF);// Reg. 4 PHIB 8Bits for duty cycle high
digitalWrite(ss, HIGH);
//delay(5);
digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2BFF);// Reg. 5 PHIB 8Bits for duty cycle high
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3E00);// Reg. 30 PHIB1 normal  timing
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F07);//                          Page 7
digitalWrite(ss, HIGH);


digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x20FF);//                          Page 7 SH1 MSB 
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F08);//                          Page 8
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2040);// Reg. 0 PHIA1 active timing non invert
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2400);// Reg. 0 SH1 active high logic non invert
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x2140);// Reg. 0 PHIB active timing non invert
digitalWrite(ss, HIGH);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x28A2);// Reg. 8 TXCLK disabled
digitalWrite(ss, HIGH);


digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x3F00);//                          Page 0
digitalWrite(ss, HIGH);
//delay(5);

digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x20A2);// Reg 0                 (PLL Lock)
digitalWrite(ss, HIGH);





digitalWrite(ss, LOW);
SPI.transfer16(0xF000);//Dummy Bits
SPI.transfer16(0x20A3);// Reg 0               (Registers Lock)
digitalWrite(ss, HIGH);