From 81b62127c287748ee638d939ca1f791bf0ea4b72 Mon Sep 17 00:00:00 2001
From: Peter Li <a0220410@ti.com>
Date: Fri, 18 Jun 2021 14:13:09 +0800
Subject: [PATCH 2/2] boot app load u-boot-spl

---
 build/build_boot-app-mcu-rtos_release.sh      |   2 +-
 mcuss_demos/boot_app_mcu_rtos/boot.c          |   2 +
 .../scripts/hlos/constructappimageshlos.sh    |   3 +-
 .../hlos/flash_ospi_boot_u-boot-spl.sh        | 131 ++++++++++++++++++
 .../scripts/hlos/linux/tiubootspl_linux.lds   |  18 +++
 .../scripts/hlos/rebuild_ubootspl.sh          |  15 ++
 mcuss_demos/boot_app_mcu_rtos/makefile        |   9 +-
 .../soc/j721e/boot_core_defs.c                |  49 +++++++
 8 files changed, 225 insertions(+), 4 deletions(-)
 create mode 100755 mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/flash_ospi_boot_u-boot-spl.sh
 create mode 100755 mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/linux/tiubootspl_linux.lds
 create mode 100755 mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/rebuild_ubootspl.sh

diff --git a/build/build_boot-app-mcu-rtos_release.sh b/build/build_boot-app-mcu-rtos_release.sh
index 87d687c..32ed8c7 100755
--- a/build/build_boot-app-mcu-rtos_release.sh
+++ b/build/build_boot-app-mcu-rtos_release.sh
@@ -1 +1 @@
-make -s -j can_boot_app_mcu_rtos HLOSBOOT=linux CANFUNC=none BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu1_0 BUILD_OS_TYPE=tirtos
+make -s -j can_boot_app_mcu_rtos HLOSBOOT=linux BOOTMODE=ospi BOOTUBOOTSPL=enabled CANFUNC=none BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu1_0 BUILD_OS_TYPE=tirtos
diff --git a/mcuss_demos/boot_app_mcu_rtos/boot.c b/mcuss_demos/boot_app_mcu_rtos/boot.c
index b748757..b19a3e8 100755
--- a/mcuss_demos/boot_app_mcu_rtos/boot.c
+++ b/mcuss_demos/boot_app_mcu_rtos/boot.c
@@ -400,10 +400,12 @@ static int32_t OSPIBootStageImage(sblEntryPoint_t *pEntry, uint32_t address)
 #        if defined(LINUX_OS)
                 else
                 {
+#if         !defined(BOOT_UBOOT_SPL)
                     status = OSPIBootImageLate(&k3xx_evmEntry, OSPI_OFFSET_A72IMG3);
                     if (status != E_PASS)
                         AppUtils_Printf(MSG_NORMAL,
                                         "Error parsing A72 appimage #3 for HLOS boot\n");
+#           endif
                 }
 #        endif
             }
diff --git a/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/constructappimageshlos.sh b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/constructappimageshlos.sh
index 99fa4bc..27fc813 100755
--- a/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/constructappimageshlos.sh
+++ b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/constructappimageshlos.sh
@@ -57,8 +57,7 @@ LDS_PATH=${PWD}/${OS}
 # Defines which appimages this script will create
 if [ $OS == "linux" ]; then
     GenFiles=("atf_optee" \
-              "tidtb_linux" \
-              "tikernelimage_linux"
+              "tiubootspl_linux"
              );
 fi
 if [ $OS == "qnx" ]; then
diff --git a/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/flash_ospi_boot_u-boot-spl.sh b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/flash_ospi_boot_u-boot-spl.sh
new file mode 100755
index 0000000..bd2eda0
--- /dev/null
+++ b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/flash_ospi_boot_u-boot-spl.sh
@@ -0,0 +1,131 @@
+# Please refer to below link for OSPI image address
+# https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/mcusw/mcal_drv/docs/drv_docs/demo_boot_app_mcu_rtos_top.html
+#
+
+#adjust blow PATH according to your own enviroment
+export FLASH_TTY_PORT=/dev/ttyUSB1
+export PSDKRA_PATH=/home/a0220410local/Public/J721E/SDK_V7.3/ti-processor-sdk-rtos-j721e-evm-07_03_00_07
+export DSLITE_PATH=/home/a0220410local/Public/J721E/uniflash_6.2.0
+export MCU_APP_PATH=$PSDKRA_PATH/mcusw/binary
+export MAIN_APP_PATH=$PSDKRA_PATH/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/binary/bin/j721e_evm
+
+#path used by utility
+export PDK_PATH=$PSDKRA_PATH/pdk_jacinto_07_03_00_29
+export FLASH_PROGRAMMER_BINARY=$PDK_PATH/packages/ti/board/utils/uniflash/target/bin/j721e_evm/uart_j721e_evm_flash_programmer_release.tiimage
+export FLASH_PROGRAMMER_SYSFW=$PDK_PATH/packages/ti/board/utils/uniflash/target/bin/j721e_evm/sysfw.bin
+export FLASH_PATTERN_BINARY=$PDK_PATH/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin
+export SBL_CUST_BINARY=$PDK_PATH/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage
+export SBL_PATH=$PDK_PATH/packages/ti/boot/sbl/binary/j721e_evm/ospi/bin
+export TIFS_BINARY=$PDK_PATH/packages/ti/drv/sciclient/soc/V1/tifs.bin
+export MCU1_0_IMAGE=$MCU_APP_PATH/can_boot_app_mcu_rtos/bin/j721e_evm/can_boot_app_mcu_rtos_mcu1_0_release.appimage
+export STAGE1_IMAGE=$MAIN_APP_PATH/multicore_MCU2_0_MCU2_1_stage1.appimage
+export STAGE2_IMAGE=$MAIN_APP_PATH/multicore_DSPs_MCU3_0_MCU3_1_stage2.appimage
+export ATF_OPTEE_IMAGE=$MAIN_APP_PATH/atf_optee.appimage
+export KERNEL_IMAGE=$MAIN_APP_PATH/tikernelimage_linux.appimage
+export DTB_IMAGE=$MAIN_APP_PATH/tidtb_linux.appimage
+export UBOOTSPL_IMAGE=$MAIN_APP_PATH/tiubootspl_linux.appimage
+export CURRENT_PATH=$PWD
+
+echo "checking $TIFS_BINARY ..."
+if [ ! -f $TIFS_BINARY ]; then
+echo "ERROR!!! $TIFS_BINARY doesn't exist!!!"
+exit 1
+else
+echo "$TIFS_BINARY is in place."
+fi
+
+echo ""
+echo "checking $FLASH_PATTERN_BINARY ..."
+if [ ! -f $FLASH_PATTERN_BINARY ]; then
+echo "ERROR!!! $FLASH_PATTERN_BINARY doesn't exist!!!"
+exit 2
+else
+echo "$FLASH_PATTERN_BINARY is in place."
+fi
+
+echo ""
+echo "checking $FLASH_PROGRAMMER_BINARY ..."
+if [ ! -f $FLASH_PROGRAMMER_BINARY ]; then
+echo "$FLASH_PROGRAMMER_BINARY doesn't exist!!!"
+echo " =============================================================================== "
+echo " Please build flash programmer in $PDK_PATH/packages/ti/build"
+echo " make PLATFORM=j721e_evm board_utils_uart_flash_programmer"
+echo " =============================================================================== "
+exit 3
+fi
+
+echo ""
+echo "checking $SBL_CUST_BINARY ..."
+if [ ! -f $SBL_CUST_BINARY ]; then
+echo "$SBL_CUST_BINARY doesn't exist, ATTENTION!!!"
+echo " =============================================================================== "
+echo " Please build the SBL in $PDK_PATH/package/ti/build "
+echo " step 1: make BOARD=j721e_evm CORE=mcu1_0 BUILD_PROFILE=release pdk_libs_clean"
+echo " step 2: make BOARD=j721e_evm CORE=mcu1_0 BUILD_PROFILE=release pdk_libs"
+echo " step 3: make BOARD=j721e_evm CORE=mcu1_0 BUILD_PROFILE=release sbl_cust_img_clean"
+echo " step 4: make BOARD=j721e_evm CORE=mcu1_0 BUILD_PROFILE=release sbl_cust_img"
+echo " =============================================================================== "
+exit 4
+fi
+
+echo ""
+echo "checking $MCU1_0_IMAGE ..."
+if [ ! -f $MCU1_0_IMAGE ]; then
+echo "$MCU1_0_IMAGE doesn't exist, ATTENTION!!!"
+exit 5
+fi
+
+echo ""
+echo "all the necessary binaries are available, good to go..."
+
+echo ""
+echo "checking $FLASH_PROGRAMMER_SYSFW ..."
+if [ ! -f $FLASH_PROGRAMMER_SYSFW ]; then
+echo "cp $TIFS_BINARY to $FLASH_PROGRAMMER_SYSFW"
+cp $TIFS_BINARY $FLASH_PROGRAMMER_SYSFW
+else
+echo "$FLASH_PROGRAMMER_SYSFW is in place."
+fi
+
+echo ""
+echo "----step 1---- flash $FLASH_PROGRAMMER_BINARY ..."
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $FLASH_PROGRAMMER_BINARY -i 0
+
+echo ""
+echo "----step 2---- erase flash ..."
+#erase flash, only needed once if FLASH layout isn't changed
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -e 3000000 -d 3 -o 0
+
+echo ""
+echo "----step 3---- flash ospi pattern ..."
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $FLASH_PATTERN_BINARY -d 3 -o 3FE0000
+
+echo ""
+echo "----step 4---- flash SBL ..."
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $SBL_CUST_BINARY -d 3 -o 0
+
+echo ""
+echo "----step 5---- flash TIFS ..."
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $TIFS_BINARY -d 3 -o 80000
+
+echo ""
+echo "----step 6---- flash mcu1_0 image ..."
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $MCU1_0_IMAGE -d 3 -o 100000
+
+echo ""
+echo "----step 7---- flash atf_optee image ..."
+if [ ! -f $ATF_OPTEE_IMAGE ]; then
+echo "$ATF_OPTEE_IMAGE doesn't exist, ATTENTION!!!"
+exit 6
+else
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $ATF_OPTEE_IMAGE -d 3 -o 1c0000
+fi
+
+echo ""
+echo "----step 8---- flash u-boot-spl image ..."
+if [ ! -f $UBOOTSPL_IMAGE ]; then
+echo "$UBOOTSPL_IMAGE doesn't exist, ATTENTION!!!"
+exit 7
+else
+$DSLITE_PATH/dslite.sh --mode processors -c $FLASH_TTY_PORT -f $UBOOTSPL_IMAGE -d 3 -o 7c0000
+fi
diff --git a/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/linux/tiubootspl_linux.lds b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/linux/tiubootspl_linux.lds
new file mode 100755
index 0000000..a5d6519
--- /dev/null
+++ b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/linux/tiubootspl_linux.lds
@@ -0,0 +1,18 @@
+/*
+ * tiubootspl_linux.lds - simple linker file for stand-alone Linux kernel booting
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE.txt file.
+ */
+OUTPUT_FORMAT("elf64-littleaarch64")
+OUTPUT_ARCH(aarch64)
+TARGET(binary)
+INPUT(u-boot-spl.bin)
+SECTIONS
+{
+ . = 0x0000000080080000;
+ spl = .;
+ .spl : { u-boot-spl.bin }
+}
diff --git a/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/rebuild_ubootspl.sh b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/rebuild_ubootspl.sh
new file mode 100755
index 0000000..08218c4
--- /dev/null
+++ b/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/rebuild_ubootspl.sh
@@ -0,0 +1,15 @@
+export PSDK_PATH=/home/a0220410local/Public/J721E/SDK_V7.3
+
+export PSDKRA_PATH=$PSDK_PATH/ti-processor-sdk-rtos-j721e-evm-07_03_00_07
+export PSDKLA_PATH=$PSDK_PATH/ti-processor-sdk-linux-j7-evm-07_03_00_05
+export CURR_PATH=$PWD
+
+# Preserve original working directory
+pushd $PWD > /dev/null
+
+cd $PSDKLA_PATH
+make u-boot_clean
+make u-boot
+
+# Restore shell to original working directory
+popd > /dev/null
diff --git a/mcuss_demos/boot_app_mcu_rtos/makefile b/mcuss_demos/boot_app_mcu_rtos/makefile
index 60f329f..00e4a4e 100755
--- a/mcuss_demos/boot_app_mcu_rtos/makefile
+++ b/mcuss_demos/boot_app_mcu_rtos/makefile
@@ -22,7 +22,11 @@ BISTFUNC ?= disabled
 #Setting BISTFUNC to enabled is only supported on j721e
 #BISTFUNC ?= enabled
 
-$(info Building MCUSW CAN Boot App with BISTFUNC=$(BISTFUNC), BOOTFUNC=$(BOOTFUNC), HLOSBOOT=$(HLOSBOOT), BOOTMODE=$(BOOTMODE), CANFUNC=$(CANFUNC) and MCUONLYFUNC=$(MCUONLYFUNC))
+# boot u-boot-spl options are enabled or disabled
+BOOTUBOOTSPL ?= enabled
+#BOOTUBOOTSPL ?= disabled
+
+$(info Building MCUSW CAN Boot App with BISTFUNC=$(BISTFUNC), BOOTFUNC=$(BOOTFUNC), HLOSBOOT=$(HLOSBOOT), BOOTMODE=$(BOOTMODE), BOOTUBOOTSPL=$(BOOTUBOOTSPL) CANFUNC=$(CANFUNC) and MCUONLYFUNC=$(MCUONLYFUNC))
 
 BUILD_OS_TYPE=tirtos
 include $(MCUSW_INSTALL_PATH)/build/Rules.make
@@ -203,6 +207,9 @@ endif
 ifeq ($(HLOSBOOT), linux)
     CFLAGS_LOCAL_COMMON += -DMPU1_HLOS_BOOT_ENABLED -DLINUX_OS
     #CFLAGS_LOCAL_COMMON += -DMPU1_HLOS_BOOT_ONLY_ENABLED -DLINUX_OS
+    ifeq ($(BOOTUBOOTSPL), enabled)
+        CFLAGS_LOCAL_COMMON += -DBOOT_UBOOT_SPL
+    endif
 else ifeq ($(HLOSBOOT), qnx)
     CFLAGS_LOCAL_COMMON += -DMPU1_HLOS_BOOT_ENABLED -DQNX_OS
     #CFLAGS_LOCAL_COMMON += -DMPU1_HLOS_BOOT_ONLY_ENABLED -DQNX_OS
diff --git a/mcuss_demos/boot_app_mcu_rtos/soc/j721e/boot_core_defs.c b/mcuss_demos/boot_app_mcu_rtos/soc/j721e/boot_core_defs.c
index 5b8e7be..d051b35 100644
--- a/mcuss_demos/boot_app_mcu_rtos/soc/j721e/boot_core_defs.c
+++ b/mcuss_demos/boot_app_mcu_rtos/soc/j721e/boot_core_defs.c
@@ -156,17 +156,31 @@ const sblSlaveCoreInfo_t sbl_late_slave_core_stages_info[NUM_BOOT_STAGES][MAX_CO
     {
         /* MCU2_CPU0 info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_MCU2_CPU0,
         SBL_DEV_ID_MCU2_CPU0,
         SBL_CLK_ID_MCU2_CPU0,
         SBL_MCU2_CPU0_FREQ_HZ,
+#endif
         },
         /* MCU2_CPU1 info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_MCU2_CPU1,
         SBL_DEV_ID_MCU2_CPU1,
         SBL_CLK_ID_MCU2_CPU1,
         SBL_MCU2_CPU1_FREQ_HZ,
+#endif
         },
         {
         SBL_INVALID_CORE,
@@ -192,38 +206,73 @@ const sblSlaveCoreInfo_t sbl_late_slave_core_stages_info[NUM_BOOT_STAGES][MAX_CO
     {
         /* MCU3_CPU0 info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_MCU3_CPU0,
         SBL_DEV_ID_MCU3_CPU0,
         SBL_CLK_ID_MCU3_CPU0,
         SBL_MCU3_CPU0_FREQ_HZ,
+#endif
         },
         /* MCU3_CPU1 info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_MCU3_CPU1,
         SBL_DEV_ID_MCU3_CPU1,
         SBL_CLK_ID_MCU3_CPU1,
         SBL_MCU3_CPU1_FREQ_HZ,
+#endif
         },
         /* DSP1_C66X info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_DSP1_C66X,
         SBL_DEV_ID_DSP1_C66X,
         SBL_CLK_ID_DSP1_C66X,
         SBL_DSP1_C66X_FREQ_HZ,
+#endif
         },
         /* DSP2_C66X info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_DSP2_C66X,
         SBL_DEV_ID_DSP2_C66X,
         SBL_CLK_ID_DSP2_C66X,
         SBL_DSP2_C66X_FREQ_HZ,
+#endif
         },
         /* DSP1_C7X info */
         {
+#ifdef BOOT_UBOOT_SPL
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE,
+        SBL_INVALID_CORE
+#else
         SBL_PROC_ID_DSP1_C7X,
         SBL_DEV_ID_DSP1_C7X,
         SBL_CLK_ID_DSP1_C7X,
         SBL_DSP1_C7X_FREQ_HZ,
+#endif
         },
     },
     {
-- 
2.17.1

