/* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" #include / { model = "TI AM335x BeagleBone Black"; compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; }; &ldo3_reg { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; &mmc1 { vmmc-supply = <&vmmcsd_fixed>; }; &mmc2 { vmmc-supply = <&vmmcsd_fixed>; pinctrl-names = "default"; pinctrl-0 = <&emmc_pins>; bus-width = <8>; status = "okay"; }; &cpu0_opp_table { /* * All PG 2.0 silicon may not support 1GHz but some of the early * BeagleBone Blacks have PG 2.0 silicon which is guaranteed * to support 1GHz OPP so enable it for PG 2.0 on this board. */ oppnitro@1000000000 { opp-supported-hw = <0x06 0x0100>; }; }; &am33xx_pinmux { bb_lcd_lcd_pins: pinmux_bb_lcd_lcd_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */ AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */ AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */ AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ >; }; nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */ >; }; mcasp0_pins: mcasp0_pins { pinctrl-single,pins = < AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */ AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */ AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */ >; }; }; &lcdc { status = "okay"; /* If you want to get 24 bit RGB and 16 BGR mode instead of * current 16 bit RGB and 24 BGR modes, set the propety * below to "crossed" and uncomment the video-ports -property * in tda19988 node. */ blue-and-red-wiring = "straight"; }; &rtc { system-power-controller; }; &sgx { status = "okay"; }; / { /* NHD-7.0-800480EF-ATXL# */ panel { status = "okay"; compatible = "ti,tilcdc,panel"; pinctrl-names = "default"; pinctrl-0 = <&bb_lcd_lcd_pins>; /* panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; bpp = <24>; fdd = <0x80>; tft-alt-mode = <0>; stn-565-mode = <0>; mono-8bit-mode = <0>; sync-edge = <0>; sync-ctrl = <1>; raster-order = <0>; fifo-th = <0>; }; display-timings { native-mode = <&timing0>; timing0: 240x320 { clock-frequency = <7200000>; hactive = <240>; vactive = <320>; hfront-porch = <38>; hback-porch = <10>; hsync-len = <10>; vback-porch = <4>; vfront-porch = <8>; vsync-len = <4>; hsync-active = <0>; // Low active vsync-active = <0>; // Low active de-active = <1>; // The data DB17-0 is written when ENABLE = “1”. Disable data write operation when ENABLE = “0”. pixelclk-active = <1>; // The data is input on the positive edge of DOTCLK }; }; */ panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; dma-burst-sz = <16>; bpp = <24>; fdd = <0x80>; tft-alt-mode = <0>; stn-565-mode = <0>; mono-8bit-mode = <0>; sync-edge = <0>; sync-ctrl = <0>; raster-order = <0>; fifo-th = <0>; }; display-timings { native-mode = <&timing0>; timing0: 800x480 { clock-frequency = <45000000>; hactive = <800>; vactive = <480>; hfront-porch = <40>; hback-porch = <40>; hsync-len = <48>; vback-porch = <29>; vfront-porch = <13>; vsync-len = <3>; hsync-active = <0>; vsync-active = <0>; }; }; }; };