diff -ru sdl_baseline/examples/bist/bist.c sdl/examples/bist/bist.c
--- sdl_baseline/examples/bist/bist.c	2024-01-12 06:08:21.398350632 -0800
+++ sdl/examples/bist/bist.c	2024-01-20 09:08:46.101244213 -0800
@@ -295,6 +295,31 @@
 				{
 					continue;
 				}
+				/* Main Infra0/1, NAVSS and MSMC should not be run, if Boot App is running in DDR */
+                if((i==7)|| (i==2)||(i==6)||(i==25))
+				{
+					continue;
+				}
+				/* HC has MMCSD in Auxiallary list*/
+				if(i==9)
+				{
+					continue;
+				}
+                /* Codecs are impacting QNX SDMMC driver */
+                if ((i==12) || (i==1))
+                {
+                    continue;
+				}
+                /* DSS is impacting QNX SDMMC driver */
+                if (i==4)
+                {
+                    continue;
+                }
+                /* A72 affects Linux boot */
+                if ((i==13)|| (i==14)||(i==15)||(i==16))
+                {
+                    continue;
+                }
                 #endif		
                 /*MCU instances are not supported for neg and pos test, 
                 So skipped according to the pbist_first_boot_stage array sequence */				
@@ -350,6 +375,31 @@
 				{
 					continue;
 				}
+                /* Main Infra0/1, NAVSS and MSMC should not be run, if Boot App is running in DDR */
+                if((i==7)|| (i==2)||(i==6)||(i==25))
+				{
+					continue;
+				}
+				/* HC has MMCSD in Auxiallary list*/
+				if(i==9)
+				{
+					continue;
+				}
+                /* Codecs are impacting QNX SDMMC driver */
+                if ((i==12) || (i==1))
+                {
+                    continue;
+				}
+                /* DSS is impacting QNX SDMMC driver */
+                if (i==4)
+                {
+                    continue;
+                }
+                /* A72 affects Linux boot */
+                if ((i==13)|| (i==14)||(i==15)||(i==16))
+                {
+                    continue;
+                }
                 #endif	
                 /*MCU instances are not supported for neg and pos test, 
                 So skipped according to the pbist_first_boot_stage array sequence */					
@@ -395,6 +445,32 @@
             #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
             for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
             {
+
+                /* Main Infra0/1, NAVSS and MSMC should not be run, if Boot App is running in DDR */
+                if((i==7)|| (i==2)||(i==6)||(i==25))
+				{
+					continue;
+				}
+				/* HC has MMCSD in Auxiallary list*/
+				if(i==9)
+				{
+					continue;
+				}
+                /* Codecs are impacting QNX SDMMC driver */
+                if ((i==12) || (i==1))
+                {
+                    continue;
+				}
+                /* DSS is impacting QNX SDMMC driver */
+                if (i==4)
+                {
+                    continue;
+                }
+                /* A72 affects Linux boot */
+                if ((i==13)|| (i==14)||(i==15)||(i==16))
+                {
+                    continue;
+                }
                 /* Run test on selected instance */
                 testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_ROM);
 
diff -ru sdl_baseline/examples/bist/pbist_utils.c sdl/examples/bist/pbist_utils.c
--- sdl_baseline/examples/bist/pbist_utils.c	2024-01-12 06:08:21.398350632 -0800
+++ sdl/examples/bist/pbist_utils.c	2024-01-15 09:05:48.365366685 -0800
@@ -535,14 +535,13 @@
 {
  #if defined(SOC_J721E) || defined(SOC_J721S2)|| defined(SOC_J784S4)
     CSL_ErrType_t status;
-    int32_t retValue = 0;
+
     /* Add firewall entry to gain access to CLEC registers */
     status = PBIST_setFirewall();
 
     if (status != CSL_PASS)
     {
         UART_printf( " PBIST_setFirewall failed \n");
-        retValue = -1;
     }
 
     return status;
@@ -1384,7 +1383,7 @@
             UART_printf("  Secondary core: Taking out of local reset the core %s \n",
                         PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecProcId,
+            status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
                                               0x0, /* Local Reset de-asserted */
                                               SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
@@ -1403,7 +1402,7 @@
         UART_printf("  Third core: Taking out of local reset the core %s \n",
                     PBIST_TestHandleArray[instanceId].thCoreName);
 #endif
-        status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciThProcId,
+        status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciThDeviceId,
                                           0x0, /* Local Reset de-asserted */
                                           SCICLIENT_SERVICE_WAIT_FOREVER);
         if (status != SDL_PASS)
@@ -1422,7 +1421,7 @@
         UART_printf("  Third core: Taking out of local reset the core %s \n",
                     PBIST_TestHandleArray[instanceId].foCoreName);
 #endif
-        status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciFoProcId,
+        status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciFoDeviceId,
                                           0x0, /* Local Reset de-asserted */
                                           SCICLIENT_SERVICE_WAIT_FOREVER);
         if (status != SDL_PASS)