U-Boot SPL 2016.05-g35dae4d-dirty (May 15 2018 - 13:49:48)
DRA722-GP ES2.0
ti_i2c_eeprom_init failed 1
925 -> optimize_vcore_voltage:efuse 0x4a003b20 bits=16 Vnom=925, using efuse value 925
925
1034 -> optimize_vcore_voltage:efuse 0x4a0025f4 bits=16 Vnom=1034, using efuse value 1034
1034
0 -> 0
935 -> optimize_vcore_voltage:efuse 0x4a003b08 bits=16 Vnom=935, using efuse value 935
935
0 -> 0
0 -> 0
cor: 1034
do_scale_vcore: volt - 1034 offset_code - 0x3c
IODELAY: IO delay recalibration successfully completed
mpu: 925
do_scale_vcore: volt - 925 offset_code - 0x31
mm: 0
gpu: 935
do_scale_vcore: volt - 935 offset_code - 0x32
eve: 0
iva: 0
setup_dplls

 core Dpll already locked with idealnominal opp valuesCore DPLL configured

 per Dpll already locked with idealnominal opp valuÊsPER DPLL locked

 mpu Dpll already locked with idealnominal opp valuesMPU DPLL locked

 usb Dpll already locked with idealnominal opp valuesBypassing DPLL failed 4a008180

 ddr Dpll already locked with idealnominal opp values
 gmac Dpll already locked with idealnominal opp values>>sdram_init()
in_sdram = 0
>>do_sdram_init() 4c000000

MII 0 power strap setting(Pull low COL,CRSHW leveling success
<<do_sdram_init() 4c000000
SDRAM: identified size not same as expected size identified: 20000000 expected: 40000000
enter here-2
<<sdram_init()
at board_init_f()
board_init_f() done
(spl.c).....board_init_r() done
>>spl:board_init_r()
TLB table from c0ffb000 to c1000000
dram_bank_mmu_setup: bank: 0
dram_bank_mmu_setup: bank: 1
using memory 0x80a80000-0x81a80000 for malloc()
spl_init()

U-Boot SPL 2016.05-g35dae4d-dirty (May 15 2018 - 13:49:48)