SBL Revision: 01.00.10.00 (Jun 15 2021 - 17:03:27) TIFS ver: 20.8.5--v2020.08b (Terrific Lla SCISERVER Board Configuration header population... PASSED Sciclient_setBoardConfigHeader... PASSED Initlialzing PLLs ...done. InitlialzingClocks ...done. Initlialzing DDR ...done. Initializing GTC ...Begin parsing user application Calling Sciclient_procBootRequestProcessor, ProcId 0x20... Calling Sciclient_procBootRequestProcessor, ProcId 0x21... Calling Sciclient_procBootRequestProcessor, ProcId 0x1... Calling Sciclient_procBootRequestProcessor, ProcId 0x2... Calling Sciclient_procBootRequestProcessor, ProcId 0x6... Calling Sciclient_procBootRequestProcessor, ProcId 0x7... Searching for X509 certificate ...not found Switching core id 4, proc_id 0x1 to split mode... Calling Sciclient_procBootGetProcessorState, ProcId 0x1... Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode... Calling Sciclient_procBootGetProcessorState, ProcId 0x1... Enabling MCU TCMs after reset for core 4 Disabling HW-based memory init of MCU TCMs for core 4 Sciclient_procBootSetProcessorCfg enabling TCMs... Copying 0x360 bytes to 0x70010000 Setting entry point for core 4 @0x70010000 Switching core id 4, proc_id 0x1 to split mode... Calling Sciclient_procBootGetProcessorState, ProcId 0x1... Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode... Sciclient_pmSetModuleState Off, DevId 0xfb... Calling Sciclient_procBootGetProcessorState, ProcId 0x2... Enabling MCU TCMs after reset for core 5 Sciclient_procBootSetProcessorCfg enabling TCMs... Setting HALT for ProcId 0x2... Sciclient_pmSetModuleState On, DevId 0xfb... Clearing core_id 5 ATCM @ 0x41400000 Clearing core_id 5 BTCM @ 0x41410000 Copying 0x368 bytes to 0x70012000 Setting entry point for core 5 @0x70012000 Switching core id 6, proc_id 0x6 to split mode... Calling Sciclient_procBootGetProcessorState, ProcId 0x6... Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode... Sciclient_pmSetModuleState Off, DevId 0xf5... Calling Sciclient_procBootGetProcessorState, ProcId 0x6... Enabling MCU TCMs after reset for core 6 Disabling HW-based memory init of MCU TCMs for core 6 Sciclient_procBootSetProcessorCfg enabling TCMs... Setting HALT for ProcId 0x6... Sciclient_pmSetModuleState On, DevId 0xf5... Clearing core_id 6 ATCM @ 0x5c00000 Clearing core_id 6 BTCM @ 0x5c10000 Copying 0x368 bytes to 0x70014000 Setting entry point for core 6 @0x70014000 Sciclient_procBootSetProcessorCfg, ProcId 0x6, EntryPoint 0x70014000... Sciclient_pmQueryModuleClkFreq, DevId 0xf5 @ 1000000000Hz... Sciclient_pmSetModuleClkFreq, DevId 0xf5 @ 1000000000Hz... Sciclient_pmGetModuleClkFreq, DevId 0xca @ 2000000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x68 FB_DIV_INT Field Value = 0x68 PLL8_FREQ_CTRL1 Register Value = 0x2aaaab FB_DIV_FRAC Field Value = 0x2aaaab PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8000 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x0 Copying first 128 bytes from app to MCU ATCM @ 0x5c00000 for core 6 Clearing HALT for ProcId 0x6... Switching core id 6, proc_id 0x6 to split mode... Calling Sciclient_procMCU2_0 running BootGetProcessorState, ProcId 0x6... Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode... Sciclient_pmSetModuleState Off, DevId 0xf6... Calling Sciclient_procBootGetProcessorState, ProcId 0x7... Enabling MCU TCMs after reset for core 7 Sciclient_procBootSetProcessorCfg enabling TCMs... Setting HALT for ProcId 0x7... Sciclient_pmSetModuleState On, DevId 0xf6... Clearing core_id 7 ATCM @ 0x5d00000 Clearing core_id 7 BTCM @ 0x5d10000 Copying 0x368 bytes to 0x70016000 Setting entry point for core 7 @0x70016000 Sciclient_procBootSetProcessorCfg, ProcId 0x7, EntryPoint 0x70016000... Sciclient_pmQueryModuleClkFreq, DevId 0xf6 @ 1000000000Hz... Sciclient_pmSetModuleClkFreq, DevId 0xf6 @ 1000000000Hz... Sciclient_pmGetModuleClkFreq, DevId 0xca @ 2000000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x68 FB_DIV_INT Field Value = 0x68 PLL8_FREQ_CTRL1 Register Value = 0x2aaaab FB_DIV_FRAC Field Value = 0x2aaaab PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8000 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x0 Copying first 128 bytes from app to MCU ATCM @ 0x5d00000 for core 7 Clearing HALT for ProcId 0x7... Sciclient_pmSetModuleState On, DevId 0x4... Copying 0x688 bytes to 0x70024000 CopyinMCU2_1 running g 0x44 bytes to 0x70024688 Setting entry point for core 0 @0x70024000 Sciclient_procBootSetProcessorCfg, ProcId 0x20, EntryPoint 0x70024000... Sciclient_pmQueryModuleClkFreq, DevId 0xca @ 1200000000Hz... Sciclient_pmSetModuleClkFreq, DevId 0xca @ 1200000000Hz... Sciclient_pmGetModuleClkFreq, DevId 0xca @ 1200000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x7d FB_DIV_INT Field Value = 0x7d PLL8_FREQ_CTRL1 Register Value = 0x0 FB_DIV_FRAC Field Value = 0x0 PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8001 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x1 Sciclient_pmSetModuleState Off, DevId 0xca... Sciclient_pmSetModuleState On, DevId 0xca... MPU1_0 running Sciclient_pmSetModuleState On, DevId 0x4... Copying 0x688 bytes to 0x70026000 Copying 0x44 bytes to 0x70026688 Setting entry point for core 1 @0x70026000 Sciclient_procBootSetProcessorCfg, ProcId 0x21, EntryPoint 0x70026000... Sciclient_pmQueryModuleClkFreq, DevId 0xcb @ 1200000000Hz... Sciclient_pmSetModuleClkFreq, DevId 0xcb @ 1200000000Hz... Sciclient_pmGetModuleClkFreq, DevId 0xca @ 1200000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x7d FB_DIV_INT Field Value = 0x7d PLL8_FREQ_CTRL1 Register Value = 0x0 FB_DIV_FRAC Field Value = 0x0 PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8001 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x1 Sciclient_pmSetModuleState Off, DevId 0xcb... Sciclient_pmSetModuleState On, DevId 0xcb... Sciclient_procMPU1_1 running BootReleaseProcessor, ProcId 0x20... Sciclient_procBootReleaseProcessor, ProcId 0x21... Sciclient_procBootReleaseProcessor, ProcId 0x1... Sciclient_procBootReleaseProcessor, ProcId 0x2... Sciclient_procBootReleaseProcessor, ProcId 0x6... Sciclient_procBootReleaseProcessor, ProcId 0x7... Booting all non-SBL cores ...done. Sciclient_pmGetModuleClkFreq, DevId 0xca @ 1200000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x7d FB_DIV_INT Field Value = 0x7d PLL8_FREQ_CTRL1 Register Value = 0x0 FB_DIV_FRAC Field Value = 0x0 PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8001 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x1 Calling Sciclient_procBootRequestProcessor, ProcId 0x1... Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x70010000... Sciclient_pmQueryModuleClkFreq, DevId 0xfa @ 1000000000Hz... Sciclient_pmSetModuleClkFreq, DevId 0xfa @ 1000000000Hz... Sciclient_pmGetModuleClkFreq, DevId 0xca @ 1200000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x7d FB_DIV_INT Field Value = 0x7d PLL8_FREQ_CTRL1 Register Value = 0x0 FB_DIV_FRAC Field Value = 0x0 PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8001 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x1 Copying first 128 bytes from app to MCU ATCM @ 0x0 for core 4 Calling Sciclient_procBootRequestProcessor, ProcId 0x2... Sciclient_procBootSetProcessorCfg, ProcId 0x2, EntryPoint 0x70012000... Sciclient_pmQueryModuleClkFreq, DevId 0xfb @ 1000000000Hz... Sciclient_pmSetModuleClkFreq, DevId 0xfb @ 1000000000Hz... Sciclient_pmGetModuleClkFreq, DevId 0xca @ 1200000000Hz... CTRLMMR_WKUP_MAIN_PLL8_CLKSEL Register Value = 0x800000 BYPASS_SW_OVRD Field Value = 0x0 BYP_WARM_RST Field Value = 0x1 CLK_SEL Field Value = 0x0 PLL8_FREQ_CTRL0 Register Value = 0x7d FB_DIV_INT Field Value = 0x7d PLL8_FREQ_CTRL1 Register Value = 0x0 FB_DIV_FRAC Field Value = 0x0 PLL8_DIV_CTRL Register Value = 0x1020001 POST_DIV2 Field Value = 0x1 POST_DIV1 Field Value = 0x2 REF_DIV Field Value = 0x1 PLL8_SS_CTRL Register Value = 0x80000000 BYPASS_EN Field Value = 0x1 WV_TBLE_MAXADDR Field Value = 0x0 RESET Field Value = 0x0 DOWNSPREAD_EN Field Value = 0x0 WAVE_SEL Field Value = 0x0 PLL8_SS_SPREAD Value = 0x10001 MOD_DIV Field Value = 0x1 SPREAD Field Value = 0x1 PLL8_HSDIV_CTRL0 Register Value = 0x8001 RESET Field Value = 0x0 CLKOUT_EN Field Value = 0x1 SYNC_DIS Field Value = 0x0 HSDIV Field Value = 0x1 Copying first 128 bytes from app to MCU ATCM @ 0x41400000 for core 5 Calling Sciclient_procBootRequestProcessor, ProcId 0x1... RuMCU1_1 running MCU1_0 running MCU1_0 reports: All tests have passed