arm_A15_1: GEL Output: ****************************************************************************************************************
arm_A15_1: GEL Output: ***************** DDR3A Leveling Values *********************
arm_A15_1: GEL Output: DDR Clock Period as measured by Leveling Registers:

arm_A15_1: GEL Output:  DX0GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX1GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX2GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX3GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX4GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX5GSR0:		0x0041A1A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	3 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX6GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX7GSR0:		0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 
arm_A15_1: GEL Output:  DX8GSR0(ECC):	0x0041A0A0 
arm_A15_1: GEL Output:  		[14:7] (Write Leveling Period): 	1 
arm_A15_1: GEL Output:  		[23:16] (Read DQS Gating Period): 	65 

arm_A15_1: GEL Output: ********************************************************
arm_A15_1: GEL Output: Delay Values from Write Leveling Registers:

arm_A15_1: GEL Output:  DX0GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX0LCDLR0:		0x00000016 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		22 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX1GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX1LCDLR0:		0x00000018 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		24 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX2GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX2LCDLR0:		0x00000025 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		37 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX3GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX3LCDLR0:		0x0000002A 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		42 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX4GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX4LCDLR0:		0x00000036 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		54 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX5GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX5LCDLR0:		0x00000042 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		66 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX6GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX6LCDLR0:		0x00000048 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		72 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX7GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX7LCDLR0:		0x0000004B 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		75 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output:  DX8GTR:			0x00005002 
arm_A15_1: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
arm_A15_1: GEL Output:  DX8LCDLR0:		0x00000028 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 WL Delay): 		40 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
arm_A15_1: GEL Output: ********************************************************
arm_A15_1: GEL Output: Equivalent 90 degree phase shift in delay units, derived from measured period:

arm_A15_1: GEL Output:  DX0LCDLR1:		0x00212126 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		38 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay):		33 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		33 
arm_A15_1: GEL Output:  DX1LCDLR1:		0x00212125 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		37 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		33 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		33 
arm_A15_1: GEL Output:  DX2LCDLR1:		0x00222225 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		37 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		34 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		34 
arm_A15_1: GEL Output:  DX3LCDLR1:		0x001E1E26 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		38 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		30 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		30 
arm_A15_1: GEL Output:  DX4LCDLR1:		0x001F1F25 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		37 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		31 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		31 
arm_A15_1: GEL Output:  DX5LCDLR1:		0x001F1E26 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		38 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		30 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		31 
arm_A15_1: GEL Output:  DX6LCDLR1:		0x00212125 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		37 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		33 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		33 
arm_A15_1: GEL Output:  DX7LCDLR1:		0x001D1C26 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		38 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		28 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
arm_A15_1: GEL Output:  DX8LCDLR1:		0x001D1D26 
arm_A15_1: GEL Output:  		[7:0] (Write Delay Shift): 		38 
arm_A15_1: GEL Output:  		[15:8] (Read DQS Delay): 		29 
arm_A15_1: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
arm_A15_1: GEL Output: ********************************************************
arm_A15_1: GEL Output: Delay Values from Read DQS Gating Leveling Registers:

arm_A15_1: GEL Output:  DX0GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX0LCDLR2:		0x00000023 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		35 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX1GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX1LCDLR2:		0x00000019 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		25 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX2GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX2LCDLR2:		0x00000026 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		38 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX3GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX3LCDLR2:		0x00000021 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		33 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX4GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX4LCDLR2:		0x00000041 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		65 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX5GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX5LCDLR2:		0x00000034 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		52 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX6GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX6LCDLR2:		0x0000004F 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		79 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX7GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX7LCDLR2:		0x00000046 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		70 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output:  DX8GTR:			0x00005002 
arm_A15_1: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	2 
arm_A15_1: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
arm_A15_1: GEL Output:  DX8LCDLR2:		0x00000037 
arm_A15_1: GEL Output:  		[7:0] (Rank 0 RL Delay): 		55 
arm_A15_1: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
arm_A15_1: GEL Output: ****************************************************************************************************************