C66xx_0: GEL Output: ****************************************************************************************************************
C66xx_0: GEL Output: ********************************************************
C66xx_0: GEL Output: DDR PLL Registers:

C66xx_0: GEL Output:  DDR3A_PLL_CTL0 register:  0x092804C0 (0x02620360)
C66xx_0: GEL Output:  	PLLD[5:0]:		0 (Pre-Divide value of 1)
C66xx_0: GEL Output:  	PLLM[18:6]:		19 (Multiplier value of 20)
C66xx_0: GEL Output:  	CLKOD[22:19]:		5 (Output Divide value of 6)
C66xx_0: GEL Output:  	BYPASS[23]:		0
C66xx_0: GEL Output:  	BWADJ-lower[31:24]: 	9
C66xx_0: GEL Output:  DDR3A_PLL_CTL1 register:  0x00000040
C66xx_0: GEL Output:  	PLLRESET[14]: Reset ** DEASSERTED ** to PLL
C66xx_0: GEL Output:  	ENSAT[6]: ENSAT is SET - (GOOD)
C66xx_0: GEL Output:  	BWADJ-upper[3:0]:	0
C66xx_0: GEL Output:  	BWADJ[11:0] (combined):	9
C66xx_0: GEL Output: ****************************************************************************************************************



C66xx_0: GEL Output: ****************************************************************************************************************
C66xx_0: GEL Output: ********************************************************
C66xx_0: GEL Output: DDR PLL Registers:

C66xx_0: GEL Output:  DDR3A_PLL_CTL0 register:  0x092804C0 (0x02620360)
C66xx_0: GEL Output:  	PLLD[5:0]:		0 (Pre-Divide value of 1)
C66xx_0: GEL Output:  	PLLM[18:6]:		19 (Multiplier value of 20)
C66xx_0: GEL Output:  	CLKOD[22:19]:		5 (Output Divide value of 6)
C66xx_0: GEL Output:  	BYPASS[23]:		0
C66xx_0: GEL Output:  	BWADJ-lower[31:24]: 	9
C66xx_0: GEL Output:  DDR3A_PLL_CTL1 register:  0x00000040
C66xx_0: GEL Output:  	PLLRESET[14]: Reset ** DEASSERTED ** to PLL
C66xx_0: GEL Output:  	ENSAT[6]: ENSAT is SET - (GOOD)
C66xx_0: GEL Output:  	BWADJ-upper[3:0]:	0
C66xx_0: GEL Output:  	BWADJ[11:0] (combined):	9
C66xx_0: GEL Output: ****************************************************************************************************************