IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Booting from NOR IBL: Boplatform_device_open(deviceid=0x50,flags=0x0) called p_info->version = 2.00.00.15 p_info->cpu.core_count = 8 p_info->cpu.name = TMS320C6678 p_info->cpu.id = 21 p_info->cpu.revision_id = 0 p_info->cpu.silicon_revision_major = 0 p_info->cpu.silicon_revision_minor = 0 p_info->cpu.megamodule_revision_major = 8 p_info->cpu.megamodule_revision_minor = 1 p_info->cpu.endian = 1 p_info->board_name = TMDXEVM6678L p_info->frequency = 1000 p_info->board_rev = 14 p_info->led[PLATFORM_USER_LED_CLASS].count = 4 p_info->led[PLATFORM_SYSTEM_LED_CLASS].count = 0 p_info->emac.port_count = 2 EMAC port 1 connected to the PHY. MAC Address = 10:ce:a9:c0:a0:e7 platform_device_open(deviceid=0xbb18,flags=0x0) called NOR Device: p_device->device_id = 47896 p_device->manufacturer_id = 32 p_device->width = 8 p_device->block_count = 256 p_device->page_count = 256 p_device->page_size = 256 p_device->spare_size = 0 p_device->handle = 47896 p_device->flags = 0 p_device->bboffset = 0 NOR test start:1 platform_device_open(deviceid=0xbb18,flags=0x0) called BUF_ORIG:255,no-0 BUF_ORIG:255,no-1 BUF_ORIG:255,no-2 BUF_ORIG:255,no-3 BUF_ORIG:255,no-4 BUF_ORIG:255,no-5 BUF_ORIG:255,no-6 BUF_ORIG:255,no-7 BUF_ORIG:255,no-8 BUF_ORIG:255,no-9 BUF_ORIG:255,no-10 BUF_ORIG:255,no-11 BUF_ORIG:255,no-12 BUF_ORIG:255,no-13 BUF_ORIG:255,no-14 BUF_ORIG:255,no-15 BUF_ORIG:255,no-16 BUF_ORIG:255,no-17 BUF_ORIG:255,no-18 BUF_ORIG:255,no-19 BUF_ORIG:255,no-20 BUF_ORIG:255,no-21 BUF_ORIG:255,no-22 BUF_ORIG:255,no-23 BUF_ORIG:255,no-24 BUF_ORIG:255,no-25 BUF_ORIG:255,no-26 BUF_ORIG:255,no-27 BUF_ORIG:255,no-28 BUF_ORIG:255,no-29 BUF_ORIG:255,no-30 BUF_ORIG:255,no-31 BUF_ORIG:255,no-32 BUF_ORIG:255,no-33 BUF_ORIG:255,no-34 BUF_ORIG:255,no-35 BUF_ORIG:255,no-36 BUF_ORIG:255,no-37 BUF_ORIG:255,no-38 BUF_ORIG:255,no-39 BUF_ORIG:255,no-40 BUF_ORIG:255,no-41 BUF_ORIG:255,no-42 BUF_ORIG:255,no-43 BUF_ORIG:255,no-44 BUF_ORIG:255,no-45 BUF_ORIG:255,no-46 BUF_ORIG:255,no-47 BUF_ORIG:255,no-48 BUF_ORIG:255,no-49 BUF_ORIG:255,no-50 BUF_ORIG:255,no-51 BUF_ORIG:255,no-52 BUF_ORIG:255,no-53 BUF_ORIG:255,no-54 BUF_ORIG:255,no-55 BUF_ORIG:255,no-56 BUF_ORIG:255,no-57 BUF_ORIG:255,no-58 BUF_ORIG:255,no-59 BUF_ORIG:255,no-60 BUF_ORIG:255,no-61 BUF_ORIG:255,no-62 BUF_ORIG:255,no-63 BUF_1:255,no-0 BUF_1:255,no-1 BUF_1:255,no-2 BUF_1:255,no-3 BUF_1:255,no-4 BUF_1:255,no-5 BUF_1:255,no-6 BUF_1:255,no-7 BUF_1:255,no-8 BUF_1:255,no-9 BUF_1:255,no-10 BUF_1:255,no-11 BUF_1:255,no-12 BUF_1:255,no-13 BUF_1:255,no-14 BUF_1:255,no-15 BUF_1:255,no-16 BUF_1:255,no-17 BUF_1:255,no-18 BUF_1:255,no-19 BUF_1:255,no-20 BUF_1:255,no-21 BUF_1:255,no-22 BUF_1:255,no-23 BUF_1:255,no-24 BUF_1:255,no-25 BUF_1:255,no-26 BUF_1:255,no-27 BUF_1:255,no-28 BUF_1:255,no-29 BUF_1:255,no-30 BUF_1:255,no-31 BUF_1:255,no-32 BUF_1:255,no-33 BUF_1:255,no-34 BUF_1:255,no-35 BUF_1:255,no-36 BUF_1:255,no-37 BUF_1:255,no-38 BUF_1:255,no-39 BUF_1:255,no-40 BUF_1:255,no-41 BUF_1:255,no-42 BUF_1:255,no-43 BUF_1:255,no-44 BUF_1:255,no-45 BUF_1:255,no-46 BUF_1:255,no-47 BUF_1:255,no-48 BUF_1:255,no-49 BUF_1:255,no-50 BUF_1:255,no-51 BUF_1:255,no-52 BUF_1:255,no-53 BUF_1:255,no-54 BUF_1:255,no-55 BUF_1:255,no-56 BUF_1:255,no-57 BUF_1:255,no-58 BUF_1:255,no-59 BUF_1:255,no-60 BUF_1:255,no-61 BUF_1:255,no-62 BUF_1:255,no-63 test_nor: Write test data failed errno = 0x30 BUF_0:171,no-0 BUF_0:171,no-1 BUF_0:171,no-2 BUF_0:171,no-3 BUF_0:171,no-4 BUF_0:171,no-5 BUF_0:171,no-6 BUF_0:171,no-7 BUF_0:171,no-8 BUF_0:171,no-9 BUF_0:171,no-10 BUF_0:171,no-11 BUF_0:171,no-12 BUF_0:171,no-13 BUF_0:171,no-14 BUF_0:171,no-15 BUF_0:171,no-16 BUF_0:171,no-17 BUF_0:171,no-18 BUF_0:171,no-19 BUF_0:171,no-20 BUF_0:171,no-21 BUF_0:171,no-22 BUF_0:171,no-23 BUF_0:171,no-24 BUF_0:171,no-25 BUF_0:171,no-26 BUF_0:171,no-27 BUF_0:171,no-28 BUF_0:171,no-29 BUF_0:171,no-30 BUF_0:171,no-31 BUF_0:171,no-32 BUF_0:171,no-33 BUF_0:171,no-34 BUF_0:171,no-35 BUF_0:171,no-36 BUF_0:171,no-37 BUF_0:171,no-38 BUF_0:171,no-39 BUF_0:171,no-40 BUF_0:171,no-41 BUF_0:171,no-42 BUF_0:171,no-43 BUF_0:171,no-44 BUF_0:171,no-45 BUF_0:171,no-46 BUF_0:171,no-47 BUF_0:171,no-48 BUF_0:171,no-49 BUF_0:171,no-50 BUF_0:171,no-51 BUF_0:171,no-52 BUF_0:171,no-53 BUF_0:171,no-54 BUF_0:171,no-55 BUF_0:171,no-56 BUF_0:171,no-57 BUF_0:171,no-58 BUF_0:171,no-59 BUF_0:171,no-60 BUF_0:171,no-61 BUF_0:171,no-62 BUF_0:171,no-63 BUF_1:255,no-0 BUF_1:255,no-1 BUF_1:255,no-2 BUF_1:255,no-3 BUF_1:255,no-4 BUF_1:255,no-5 BUF_1:255,no-6 BUF_1:255,no-7 BUF_1:255,no-8 BUF_1:255,no-9 BUF_1:255,no-10 BUF_1:255,no-11 BUF_1:255,no-12 BUF_1:255,no-13 BUF_1:255,no-14 BUF_1:255,no-15 BUF_1:255,no-16 BUF_1:255,no-17 BUF_1:255,no-18 BUF_1:255,no-19 BUF_1:255,no-20 BUF_1:255,no-21 BUF_1:255,no-22 BUF_1:255,no-23 BUF_1:255,no-24 BUF_1:255,no-25 BUF_1:255,no-26 BUF_1:255,no-27 BUF_1:255,no-28 BUF_1:255,no-29 BUF_1:255,no-30 BUF_1:255,no-31 BUF_1:255,no-32 BUF_1:255,no-33 BUF_1:255,no-34 BUF_1:255,no-35 BUF_1:255,no-36 BUF_1:255,no-37 BUF_1:255,no-38 BUF_1:255,no-39 BUF_1:255,no-40 BUF_1:255,no-41 BUF_1:255,no-42 BUF_1:255,no-43 BUF_1:255,no-44 BUF_1:255,no-45 BUF_1:255,no-46 BUF_1:255,no-47 BUF_1:255,no-48 BUF_1:255,no-49 BUF_1:255,no-50 BUF_1:255,no-51 BUF_1:255,no-52 BUF_1:255,no-53 BUF_1:255,no-54 BUF_1:255,no-55 BUF_1:255,no-56 BUF_1:255,no-57 BUF_1:255,no-58 BUF_1:255,no-59 BUF_1:255,no-60 BUF_1:255,no-61 BUF_1:255,no-62 BUF_1:255,no-63 test_nor: Data verification failed test_nor: Write back original data failed errno = 0x30 NOR test complete:1