diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
index b1737978103b..5a7b614b7b4c 100644
--- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
@@ -13,6 +13,12 @@ / {
 	compatible = "ti,am625-sk", "ti,am625";
 	model = "Texas Instruments AM625 SK";
 
+	dma_test {
+		compatible = "ti,dma_test";
+		dmas = <&main_bcdma 1 0 0>;
+		dma-names = "rx";
+	};
+
 	opp-table {
 		/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
 		opp-1400000000 {
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index ff3dc91f826c..f06899367ebd 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -952,9 +952,14 @@ static int udma_start(struct udma_chan *uc)
 		udma_rchanrt_write(uc, UDMA_CHAN_RT_CTL_REG,
 				   UDMA_CHAN_RT_CTL_EN);
 
-		/* Enable remote */
-		udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_RT_EN_REG,
+		if (!uc->config.tr_trigger_type)
+			/* Enable remote */
+			udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_RT_EN_REG,
 				   UDMA_PEER_RT_EN_ENABLE);
+		else
+			udma_tchanrt_write(uc, UDMA_CHAN_RT_CTL_REG,
+				   UDMA_CHAN_RT_CTL_EN);
+
 
 		break;
 	case DMA_MEM_TO_DEV:
@@ -2827,7 +2832,7 @@ static struct udma_desc *udma_alloc_tr_desc(struct udma_chan *uc,
 	if (uc->cyclic)
 		reload_count = CPPI5_INFO0_TRDESC_RLDCNT_INFINITE;
 
-	if (dir == DMA_DEV_TO_MEM)
+	if (dir == DMA_DEV_TO_MEM && !uc->config.tr_trigger_type)
 		ring_id = k3_ringacc_get_ring_id(uc->rflow->r_ring);
 	else
 		ring_id = k3_ringacc_get_ring_id(uc->tchan->tc_ring);
@@ -2987,6 +2992,7 @@ udma_prep_slave_sg_triggered_tr(struct udma_chan *uc, struct scatterlist *sgl,
 	int num_tr = 0;
 	int tr_idx = 0;
 	u32 burst, trigger_size, port_window;
+	int dim1;
 	u64 asel;
 
 	if (dir == DMA_DEV_TO_MEM) {
@@ -3021,6 +3027,7 @@ udma_prep_slave_sg_triggered_tr(struct udma_chan *uc, struct scatterlist *sgl,
 		tr_cnt1 = burst;
 	}
 	trigger_size = tr_cnt0 * tr_cnt1;
+	dim1 = (uc->config.tr_trigger_type) ? 0 : (-1) * tr_cnt0;
 
 	/* estimate the number of TRs we will need */
 	for_each_sg(sgl, sgent, sglen, i) {
@@ -3085,7 +3092,7 @@ udma_prep_slave_sg_triggered_tr(struct udma_chan *uc, struct scatterlist *sgl,
 			tr_req[tr_idx].icnt1 = tr_cnt1;
 			tr_req[tr_idx].icnt2 = tr0_cnt2;
 			tr_req[tr_idx].icnt3 = tr0_cnt3;
-			tr_req[tr_idx].dim1 = (-1) * tr_cnt0;
+			tr_req[tr_idx].dim1 = dim1;
 
 			tr_req[tr_idx].daddr = sg_addr;
 			tr_req[tr_idx].dicnt0 = tr_cnt0;
@@ -3132,7 +3139,7 @@ udma_prep_slave_sg_triggered_tr(struct udma_chan *uc, struct scatterlist *sgl,
 				tr_req[tr_idx].icnt1 = tr_cnt1;
 				tr_req[tr_idx].icnt2 = tr1_cnt2;
 				tr_req[tr_idx].icnt3 = 1;
-				tr_req[tr_idx].dim1 = (-1) * tr_cnt0;
+				tr_req[tr_idx].dim1 = dim1;
 
 				tr_req[tr_idx].daddr = sg_addr;
 				tr_req[tr_idx].dicnt0 = tr_cnt0;
@@ -3417,6 +3424,7 @@ udma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 	struct udma_desc *d;
 	u32 burst;
 
+#if 0
 	if (dir != uc->config.dir &&
 	    (uc->config.dir == DMA_MEM_TO_MEM && !uc->config.tr_trigger_type)) {
 		dev_err(chan->device->dev,
@@ -3426,6 +3434,7 @@ udma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 			dmaengine_get_direction_text(dir));
 		return NULL;
 	}
+#endif
 
 	if (dir == DMA_DEV_TO_MEM) {
 		dev_width = uc->cfg.src_addr_width;
@@ -3446,7 +3455,7 @@ udma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 	if (uc->config.pkt_mode)
 		d = udma_prep_slave_sg_pkt(uc, sgl, sglen, dir, tx_flags,
 					   context);
-	else if (is_slave_direction(uc->config.dir))
+	else if (is_slave_direction(uc->config.dir) && !uc->config.tr_trigger_type)
 		d = udma_prep_slave_sg_tr(uc, sgl, sglen, dir, tx_flags,
 					  context);
 	else
@@ -3778,6 +3787,9 @@ static void udma_issue_pending(struct dma_chan *chan)
 	struct udma_chan *uc = to_udma_chan(chan);
 	unsigned long flags;
 
+	if (uc->config.tr_trigger_type && uc->bchan)
+		dev_info(NULL, "___chan%d: id %d\n", uc->id, uc->bchan->id);
+
 	spin_lock_irqsave(&uc->vc.lock, flags);
 
 	/* If we have something pending and no active descriptor, then */
