diff --git a/arch/arm/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/dts/am57xx-beagle-x15-common.dtsi index a6216b5..8dcabd4 100644 --- a/arch/arm/dts/am57xx-beagle-x15-common.dtsi +++ b/arch/arm/dts/am57xx-beagle-x15-common.dtsi @@ -482,7 +482,7 @@ }; &usb1 { - dr_mode = "host"; + dr_mode = "peripheral"; }; &omap_dwc3_2 { diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi index 81c9f55..a7c6465 100644 --- a/arch/arm/dts/am57xx-idk-common.dtsi +++ b/arch/arm/dts/am57xx-idk-common.dtsi @@ -300,7 +300,7 @@ }; &usb1 { - dr_mode = "host"; + dr_mode = "peripheral"; }; &usb2 { diff --git a/board/embest/som_am572x/board.c b/board/embest/som_am572x/board.c index 5eddb7e..2381f26 100644 --- a/board/embest/som_am572x/board.c +++ b/board/embest/som_am572x/board.c @@ -705,6 +705,26 @@ int spl_start_uboot(void) #endif #ifdef CONFIG_USB_DWC3 +static struct dwc3_device usb_otg_ss1 = { + .maximum_speed = USB_SPEED_SUPER, + .base = DRA7_USB_OTG_SS1_BASE, + .tx_fifo_resize = false, + .index = 0, +}; + +static struct dwc3_omap_device usb_otg_ss1_glue = { + .base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE, + .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, + .index = 0, +}; + +static struct ti_usb_phy_device usb_phy1_device = { + .pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL, + .usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER, + .usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER, + .index = 0, +}; + static struct dwc3_device usb_otg_ss2 = { .maximum_speed = USB_SPEED_HIGH, .base = DRA7_USB_OTG_SS2_BASE, @@ -742,9 +762,13 @@ int board_usb_init(int index, enum usb_init_type init) switch (index) { case 0: if (init == USB_INIT_DEVICE) { - printf("port %d can't be used as device\n", index); - disable_usb_clocks(index); - return -EINVAL; +#ifdef CONFIG_USB_DWC3 + usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL; + usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; + ti_usb_phy_uboot_init(&usb_phy1_device); + dwc3_omap_uboot_init(&usb_otg_ss1_glue); + dwc3_uboot_init(&usb_otg_ss1); +#endif } break; case 1: diff --git a/include/configs/som_am572x.h b/include/configs/som_am572x.h index 08acbad..1603c5b 100644 --- a/include/configs/som_am572x.h +++ b/include/configs/som_am572x.h @@ -60,11 +60,33 @@ "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ "name=userdata,size=-,uuid=${uuid_gpt_userdata}" +#ifndef CONFIG_SPL_BUILD #define DFUARGS \ "dfu_bufsiz=0x10000\0" \ DFU_ALT_INFO_MMC \ DFU_ALT_INFO_EMMC \ DFU_ALT_INFO_RAM \ + DFU_ALT_INFO_QSPI +#else +/* Discard fastboot in SPL build, to spare some space */ +#undef CONFIG_FASTBOOT +#undef CONFIG_USB_FUNCTION_FASTBOOT +#undef CONFIG_CMD_FASTBOOT +#undef CONFIG_ANDROID_BOOT_IMAGE +#undef CONFIG_FASTBOOT_BUF_ADDR +#undef CONFIG_FASTBOOT_BUF_SIZE +#undef CONFIG_FASTBOOT_FLASH +#endif + +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_CMD_BOOTD +#ifdef CONFIG_SPL_DFU_SUPPORT +#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 +#define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_RAM +#endif +#endif #include @@ -94,7 +116,7 @@ #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #define CONFIG_OMAP_USB_PHY -#define CONFIG_OMAP_USB3PHY1_HOST +#define CONFIG_OMAP_USB2PHY2_HOST /* SPL SATA */ #define CONFIG_SPL_SATA_SUPPORT diff --git a/include/linux/usb/xhci-omap.h b/include/linux/usb/xhci-omap.h index 9de80d7..b169402 100644 --- a/include/linux/usb/xhci-omap.h +++ b/include/linux/usb/xhci-omap.h @@ -10,14 +10,15 @@ #ifndef _ASM_ARCH_XHCI_OMAP_H_ #define _ASM_ARCH_XHCI_OMAP_H_ -#ifdef CONFIG_TARGET_DRA7XX_EVM +//#ifdef CONFIG_TARGET_DRA7XX_EVM +#if defined(CONFIG_TARGET_DRA7XX_EVM) || defined(CONFIG_TARGET_SOM_AM572X) #define OMAP_XHCI_BASE 0x488d0000 #define OMAP_OCP1_SCP_BASE 0x4A081000 #define OMAP_OTG_WRAPPER_BASE 0x488c0000 -#elif defined CONFIG_TARGET_AM57XX_EVM -#define OMAP_XHCI_BASE 0x48890000 -#define OMAP_OCP1_SCP_BASE 0x4A084c00 -#define OMAP_OTG_WRAPPER_BASE 0x48880000 +//#elif defined CONFIG_TARGET_AM57XX_EVM +//#define OMAP_XHCI_BASE 0x48890000 +//#define OMAP_OCP1_SCP_BASE 0x4A084c00 +//#define OMAP_OTG_WRAPPER_BASE 0x48880000 #elif defined CONFIG_AM43XX #define OMAP_XHCI_BASE 0x483d0000 #define OMAP_OCP1_SCP_BASE 0x483E8000