void i2cInit(void)
{
/* USER CODE BEGIN (3) */
/* USER CODE END */
    /** @b initialize @b I2C1 */

    /** - i2c Enter reset */
    i2cREG1->MDR = (uint32)((uint32)0U << 5U);

    /** - set i2c mode */
    i2cREG1->MDR =   (uint32)((uint32)0U << 15U)     /* nack mode  */
                   | (uint32)((uint32)0U << 14U)     /* free running */
                   | (uint32)((uint32)0U << 13U)     /* start condition - master mode only */
                   | (uint32)((uint32)1U <<11U)     /* stop condition   */
                   | (uint32)((uint32)1U <<10U)     /* Master/Slave mode  */
                   | (uint32)((uint32)I2C_TRANSMITTER)     /* Transmitter/receiver */
                   | (uint32)((uint32)I2C_7BIT_AMODE)     /* xpanded address */
                   | (uint32)((uint32)0U << 7U)      /* repeat mode */
                   | (uint32)((uint32)0U << 6U)     /* digital loopback */
                   | (uint32)((uint32)0U << 4U)     /* start byte - master only */
                   | (uint32)((uint32)0U << 3U)     /* free data format */
                   | (uint32)((uint32)I2C_8_BIT);     /* bit count */

    /** - set i2c extended mode */
    i2cREG1->EMDR = (uint32)0U << 1U; /* Ignore Nack Enable/Disable */

    /** - set i2c Backward Compatibility mode */
    i2cREG1->EMDR |= 0U;

    /** - Disable DMA */
    i2cREG1->DMACR = 0x00U;

    /** - set i2c data count */
    i2cREG1->CNT = 8U;

    /** - disable all interrupts */
    i2cREG1->IMR = 0x00U;

    /** - set prescale */
    i2cREG1->PSC = 8U;

    /** - set clock rate */
    i2cREG1->CKH = 37U;
    i2cREG1->CKL = 37U;

    /** - set i2c pins functional mode */
    i2cREG1->PFNC = (0U);

    /** - set i2c pins default output value */
    i2cREG1->DOUT = (uint32)((uint32)1U << 1U)     /* sda pin */
                  | (uint32)(1U);     /* scl pin */

    /** - set i2c pins output direction */
    i2cREG1->DIR = (uint32)((uint32)1U << 1U)     /* sda pin */
                 | (uint32)(1U);     /* scl pin */

    /** - set i2c pins open drain enable */
    i2cREG1->PDR = (uint32)((uint32)0U << 1U)     /* sda pin */
                 | (uint32)(0U);     /* scl pin */

    /** - set i2c pins pullup/pulldown enable */
    i2cREG1->PDIS = (uint32)((uint32)1U << 1U)     /* sda pin */
                | (uint32)(1U);     /* scl pin */

    /** - set i2c pins pullup/pulldown select */
    i2cREG1->PSEL = (uint32)((uint32)1U << 1U)     /* sda pin */
                 | (uint32)(1U);     /* scl pin */

    /** - set interrupt enable */
    i2cREG1->IMR    = (uint32)((uint32)0U << 6U)     /* Address as slave interrupt      */
                    | (uint32)((uint32)0U << 5U)     /* Stop Condition detect interrupt */
                    | (uint32)((uint32)0U << 4U)     /* Transmit data ready interrupt   */
                    | (uint32)((uint32)0U << 3U)     /* Receive data ready interrupt    */
                    | (uint32)((uint32)0U << 2U)     /* Register Access ready interrupt */
                    | (uint32)((uint32)0U << 1U)     /* No Acknowledgment interrupt    */
                    | (uint32)((uint32)0U);     /* Arbitration Lost interrupt      */

    i2cREG1->MDR |= (uint32)I2C_RESET_OUT; /* i2c out of reset */

    /** - initialize global transfer variables */
    g_i2cTransfer_t[0U].mode   = (uint32)0U << 4U;
    g_i2cTransfer_t[0U].length = 0U;

    /** @b initialize @b I2C2 */

    /** - i2c Enter reset */
    i2cREG2->MDR = (uint32)((uint32)0U << 5U);

    /** - set i2c mode */
    i2cREG2->MDR =   (uint32)((uint32)0U << 15U)     /* nack mode  */
                   | (uint32)((uint32)0U << 14U)     /* free running */
                   | (uint32)((uint32)0U << 13U)     /* start condition - master mode only */
                   | (uint32)((uint32)1U <<11U)     /* stop condition   */
                   | (uint32)((uint32)1U <<10U)     /* Master/Slave mode  */
                   | (uint32)((uint32)I2C_TRANSMITTER)     /* Transmitter/receiver */
                   | (uint32)((uint32)I2C_7BIT_AMODE)     /* Expanded address */
                   | (uint32)((uint32)0 << 7U)      /* repeat mode */
                   | (uint32)((uint32)0U << 6U)     /* digital loopback */
                   | (uint32)((uint32)0U << 4U)     /* start byte - master only */
                   | (uint32)((uint32)0U << 3U)     /* free data format */
                   | (uint32)(I2C_8_BIT);     /* bit count */

    /** - set i2c extended mode */
    i2cREG2->EMDR = (uint32)0U << 1U; /* Ignore Nack Enable/Disable */

    /** - set i2c Backward Compatibility mode */
    i2cREG2->EMDR |= 0U;

    /** - Disable DMA */
    i2cREG2->DMACR = 0x00U;

    /** - set i2c data count */
    i2cREG2->CNT = 8U;

    /** - disable all interrupts */
    i2cREG2->IMR = 0x00U;

    /** - set prescale */
    i2cREG2->PSC = 8U;

    /** - set clock rate */
    i2cREG2->CKH = 37U;
    i2cREG2->CKL = 37U;

    /** - set i2c pins functional mode */
    i2cREG2->PFNC = (0U);

    /** - set i2c pins default output value */
    i2cREG2->DOUT = (uint32)((uint32)1U << 1U)     /* sda pin */
                  | (uint32)(1U);     /* scl pin */

    /** - set i2c pins output direction */
    i2cREG2->DIR = (uint32)((uint32)1U << 1U)     /* sda pin */
                 | (uint32)(1U);     /* scl pin */

    /** - set i2c pins open drain enable */
    i2cREG2->PDR = (uint32)((uint32)0U << 1U)     /* sda pin */
                 | (uint32)(0U);     /* scl pin */

    /** - set i2c pins pullup/pulldown enable */
    i2cREG2->PDIS = (uint32)((uint32)1U << 1U)     /* sda pin */
                | (uint32)(1U);     /* scl pin */

    /** - set i2c pins pullup/pulldown select */
    i2cREG2->PSEL = (uint32)((uint32)1U << 1U)     /* sda pin */
                 | (uint32)(1U);     /* scl pin */

    /** - set interrupt enable */
    i2cREG2->IMR    = (uint32)((uint32)0U << 6U)     /* Address as slave interrupt      */
                    | (uint32)((uint32)0U << 5U)     /* Stop Condition detect interrupt */
                    | (uint32)((uint32)0U << 4U)     /* Transmit data ready interrupt   */
                    | (uint32)((uint32)0U << 3U)     /* Receive data ready interrupt    */
                    | (uint32)((uint32)0U << 2U)     /* Register Access ready interrupt */
                    | (uint32)((uint32)0U << 1U)     /* No Acknowledgment interrupt    */
                    | (uint32)(0U);     /* Arbitration Lost interrupt      */

    i2cREG2->MDR |= (uint32)I2C_RESET_OUT; /* i2c out of reset */

    /** - initialize global transfer variables */
    g_i2cTransfer_t[1U].mode   = (uint32)0U << 4U;
    g_i2cTransfer_t[1U].length = 0U;

/* USER CODE BEGIN (4) */
/* USER CODE END */
}


void TSS_vInit(){
    // set registers for sending to TCN75
    // set slave address
	uint8_t idx;
	uint8_t devAddr=0;
	uint8_t RX_Data[2]={0};
	uint8_t bitmsk=0;
	printf("TSS_vInit\n");
	for(idx = 0; idx < 2; idx++)
	{
		devAddr=( idx ==0)? TCN75_1_I2C_ADDR:  TCN75_2_I2C_ADDR;
		if(devAddr==TCN75_1_I2C_ADDR) bitmsk=BIT0_TCN75_1;
		else if(devAddr==TCN75_2_I2C_ADDR) bitmsk=BIT1_TCN75_2;

		printf("Temp sensor devAddr= 0x%2x \n", devAddr);
		SER_vCh2I2cRxData(devAddr,2,RX_Data);

		printf("D:%d %d\r\n", RX_Data[0],  RX_Data[1]);
		bool bErrorIC= (u8I2cErrorBits & bitmsk? true:false);
		printf("Temp IC %d error %d\n", idx, bErrorIC);

	}

}

void SER_vCh2I2cRxData(uint8_t addr, uint8_t length, uint8_t* rxbuf){
    uint8_t* RX_Data=rxbuf;
	i2cBASE_t *i2c=i2cREG2;
	uint8_t error=0;
	uint8_t bitmsk=0;
	uint32_t delay=0;

	if(addr==TCN75_1_I2C_ADDR) bitmsk=BIT0_TCN75_1;
	else if(addr==TCN75_2_I2C_ADDR) bitmsk=BIT1_TCN75_2;
	else if(addr==MAX5392_1_I2C_ADDR) bitmsk=BIT2_MAX5392_1;
	else if(addr==MAX5392_2_I2C_ADDR) bitmsk=BIT3_MAX5392_2;

	i2cSetMode(i2c, I2C_MASTER);
	i2cSetDirection(i2c, I2C_RECEIVER);
	i2cSetSlaveAdd(i2c, addr); // temp sensor is using i2c2

	i2cSetStop(i2c);

	/* Transmit Start Condition */
	i2cSetStart(i2c);

	//i2cSetStop(i2c);
	//i2cClearSCD(i2c);
	i2cSetCount(i2c, length);

	i2cReceive(i2c, length, RX_Data);
	//i2cSendByte(i2c, 0x00);

	/* Wait until Bus Busy is cleared */
	while(i2cIsBusBusy(i2c) == true)
	{
		  delay++;
		  if((i2c->STR & I2C_NACK) == I2C_NACK || delay > 10000 )
		  {
			  u8I2cErrorBits |=bitmsk;
			  error=1;
			  break;  /*break while loop*/
		  }
	}
	/* Wait until Stop is detected */
	delay=0;
	while(i2cIsStopDetected(i2c) == 0)
	{
		  delay++;
		  if((i2c->STR & I2C_NACK) == I2C_NACK || delay > 10000 )
		  {
			  error=1;
			  u8I2cErrorBits |=  bitmsk;
				break;  /*break while loop*/
		  }
	}
	/* Clear the Stop condition */
	if (error)
	{
		error=0;
		/*NACK is received due to slave not connected, So go to the next slave*/
		u16I2cSTRSave=i2c->STR;

		i2c->MDR = (uint32)((uint32)0U << 5U);/** - i2c Enter reset */
		i2c->MDR |= (uint32)I2C_RESET_OUT; /* i2c out of reset */

	}

	i2cSetStop(i2c);
	i2cClearSCD(i2c);
	printf("Data:%d %d\r\n", RX_Data[0],  *(&RX_Data[1]));
	bool bErrorIC= (u8I2cErrorBits & bitmsk? true:false);
	printf("SER_vCh2I2cRxData end Error %d\n", bErrorIC);

}