/*----------------------------------------------------------------------------*/ /* sys_link.cmd */ /* */ /* * Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* */ /*----------------------------------------------------------------------------*/ /* USER CODE BEGIN (0) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Linker Settings */ --retain="*(.intvecs)" /* USER CODE BEGIN (1) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Memory Map */ MEMORY { /* USER CODE BEGIN (2) */ #if 0 /* USER CODE END */ VECTORS (X) : origin=0x00000000 length=0x00000020 FLASH0 (RX) : origin=0x00000020 length=0x001FFFE0 FLASH1 (RX) : origin=0x00200000 length=0x00200000 STACKS (RW) : origin=0x08000000 length=0x00001500 RAM (RW) : origin=0x08001500 length=0x0007EB00 /* USER CODE BEGIN (3) */ #endif #if 1 VECTORS (X) : origin=0x00000000 length=0x00000020 fill = 0xffffffff FLASH0 (RX) : origin=0x00000020 length=0x001FFFE0 vfill = 0xffffffff FLASH1 (RX) : origin=0x00200000 length=0x00200000 vfill = 0xffffffff /* Bank 7 (128kB, FEE) */ FLASH7 (R) : origin=0xF0200000 length=0x00020000 vfill = 0xffffffff STACKS (RW) : origin=0x08000000 length=0x00001000 RAM (RW) : origin=0x08002500 length=(0x0002EB00-0x2500) /* Bank 0 ECC */ ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3)) length=(size(VECTORS) >> 3) ECC={algorithm=algoL2R5F021, input_range=VECTORS} ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3)) length=(size(FLASH0) >> 3) ECC={algorithm=algoL2R5F021, input_range=FLASH0 } /* Bank 1 ECC */ ECC_FLA1 (R) : origin=(0xf0400000 + (start(FLASH1) >> 3)) length=(size(FLASH1) >> 3) ECC={algorithm=algoL2R5F021, input_range=FLASH1 } /* Bank 7 ECC */ ECC_FLA7 (R) : origin=0xF0100000 length=(size(FLASH7) >> 3) ECC={algorithm=algoL2R5F021, input_range=FLASH7 } #endif /* USER CODE END */ } /* USER CODE BEGIN (4) */ #if 1 ECC { algoL2R5F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */ hamming_mask = R4 /* Use R4/R5 build in Mask */ parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */ mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */ } #endif /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Section Configuration */ SECTIONS { /* USER CODE BEGIN (5) */ #if 0 /* USER CODE END */ .intvecs : {} > VECTORS .text align(32) : {} > FLASH0 | FLASH1 .const align(32) : {} > FLASH0 | FLASH1 .cinit align(32) : {} > FLASH0 | FLASH1 .pinit align(32) : {} > FLASH0 | FLASH1 .bss : {} > RAM .data : {} > RAM .sysmem : {} > RAM FEE_TEXT_SECTION : {} > FLASH0 | FLASH1 FEE_CONST_SECTION : {} > FLASH0 | FLASH1 FEE_DATA_SECTION : {} > RAM /* USER CODE BEGIN (6) */ #endif #if 1 .intvecs : {} palign=8 > VECTORS flashAPI: { .\Boot\Fapi_UserDefinedFunctions.obj (.text, .data) .\Boot\bl_flash.obj (.text, .data) --library = F021_API_CortexR4_BE_L2FMC.lib (.text, .data) } palign=8 load = FLASH0 |FLASH1, run = RAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize) .text : {} palign=8 > FLASH0 |FLASH1 .const : {} palign=8 load=FLASH0 |FLASH1 .cinit : {} palign=8 > FLASH0 | FLASH1 .pinit : {} palign=8 > FLASH0 | FLASH1 .bss : {} > RAM /* Uninitialized global and static variables */ .data : {} > RAM /* Global and static non-const variables that are explicitly initialized. */ .sysmem : {} > RAM /* Memory pool (heap) for dynamic memory allocation */ FEE_TEXT_SECTION : {} > FLASH0 | FLASH1 FEE_CONST_SECTION : {} > FLASH0 | FLASH1 FEE_DATA_SECTION : {} > RAM #endif /* USER CODE END */ } /* USER CODE BEGIN (7) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/ /* Misc */ /* USER CODE BEGIN (8) */ /* USER CODE END */ /*----------------------------------------------------------------------------*/