/* Linker Settings */
--retain="*(.intvecs)"
/* Memory Map */
MEMORY
{
	/* Add a vfill directive to the end of each line that maps to Flash */
	VECTORS (X) : origin=0x00020000 length=0x00000020 vfill = 0xffffffff
	FLASH0 (RX) : origin=0x00020020 length=0x0011ffE0 vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00001500
    RAM     (RW) : origin=0x08001500 length=0x0002EB00
	/* USER CODE BEGIN (3) */
	#if 1
	/* Add memory regions corresponding to the ECC area of the flash bank */
	ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
	length=(size(VECTORS) >> 3)
	ECC={algorithm=algoL2R5F021, input_range=VECTORS}
	ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
	length=(size(FLASH0) >> 3)
	ECC={algorithm=algoL2R5F021, input_range=FLASH0 }
	#endif
	/* USER CODE END */
}
/* USER CODE BEGIN (4) */
/* Add an ECC {} directive describing the algorithm that matches the device */
ECC
{
	algoL2R5F021 : address_mask = 0xfffffff8 /*Address Bits 31:3 */
	hamming_mask = R4 /*Use R4/R5 build in Mask */
	parity_mask = 0x0c /*Set which ECC bits are Even & Odd parity */
	mirroring = F021 /*RM57Lx and TMS570LCx are build in F021*/
}
/* USER CODE END */
SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0
    .const   : {} > FLASH0
    .cinit   : {} > FLASH0
    .pinit   : {} > FLASH0
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM


/* USER CODE BEGIN (6) */
/* USER CODE END */

}