TAS5760L: Setting for I2C

Hi Hikaru

Hikaru Nozaki said:

1 If Master write some parameter in state "SPK_SD=H", are there any troubles?
     e.g. TAS5760L send NACK etc..   

Also could config the I2C, will ACK.

Hikaru Nozaki said:

     Is it mean that even if SPK_SD bit(B0 of 0x01) is "1", if SPK_SD pin is "LOW", TAS5760L is placed in to shutdown?

Yes, no problem.

Hikaru Nozaki said:

Are there any trouble about change value of Left and Right Channnel Volume Control resisters in state "SPK_SD=H"?

No problem, you could change them during SPK_SD=H

Hikaru Nozaki said:

 Is it correct that set "0x00" for Left and Right Channnel Volume Control resisters?

If we fully follow this procedure, we should still at Shutdown state, needn't to change the Volume. About the Volume, set to 0000 0111 is -100dB, lowest. Also in register 0x03, there's Mute setting for both Left /Right channel, needn't to change Volume.  

Hi Shadow

>> Also in register 0x03, there's Mute setting for both Left /Right channel, needn't to change Volume.  
What I'd like to know is the purpose of set to mute state during set parameters.
Our softwear engineer set register 0x04&0x05 to 0x00 in order to set to Mute state. 
Should we change register 0x03?

When our system power on, Master send I2C to TAS5760L. However, TAS5760L often returen NACK and CLK stay Low.
Do you have any idea why TAS5760L return NACK?
If TAS5760L return NACK, does it force CLK to LOW?

We want to know whether the cause of this error is TAS5760L or Master.

Hi Hikaru

Hikaru Nozaki said:

Our softwear engineer set register 0x04&0x05 to 0x00 in order to set to Mute state. 

I'm afraid value 0x00 is not MUTE state. You need to set to Min value -100dB to be similar as MUTE.

Hikaru Nozaki said:

When our system power on, Master send I2C to TAS5760L. However, TAS5760L often returen NACK and CLK stay Low.

Device TAS5760L won't pull low SCL line, maybe we need to check the I2C in our system.

Hi Shadow

>>I'm afraid value 0x00 is not MUTE state. You need to set to Min value -100dB to be similar as MUTE.
I understood. I tell it to our softwear engineer and modify.

>> maybe we need to check the I2C in our system.
I'm asking if there's anything wrong or not in master system.
If there is something strange about TAS5760, please tell me.

Hi Shadow

Sorry bother you, but I'd like to ask about Mute state.

Is it any problem to set "0x00" to Left & Right volume parameters?
According to datasheet, "Any setting less than 00000111 places the channel in Mute", We think there is no problems...

If there is any problems to set "0x00", does it cause this problem = "I2C error such as reply NACK "?

Hi Shadow

Hikaru Nozaki said:

Is it any problem to set "0x00" to Left & Right volume parameters?

Sorry that I made a mistake about this value, set 0x00 no problem. I made a mistake between other device.

No concern about this point.

Hi Shadow

>> set 0x00 no problem
I understood.

According to Setup procedure, maku sure to mute before set parameters by I2C.
If this rule is not followed, I2C error is occurd? or is it a countermeasure for pop noise?

Hi Shadow

Shadow He said:

Device TAS5760L won't pull low SCL line, maybe we need to check the I2C in our system.

#1 How about the progres of it?

#2 According to other TAS5760M's thread(https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1110468/tas5760m-questions-about-i2c?keyMatch=TAS5760M%20I2C), "At the beginning of the design TAS5760M, only the volume control register can be dynamically adjusted, and other registers need to be shutdown before they can be reconfigured."
Does volume control register in this sentence means  "Volume Control Configuration" or "Left or Right Channel Volume Control" of TAS5760M's register?
Or does it mean both?

#3 According to other TAS5760M's thread(https://e2e.ti.com/support/audio/f/audio-forum/628724/tas5760m-nack-issue-with-a-couple-of-tas5760ms-in-pbtl-configuration?keyMatch=TAS5760M%20I2C), "TAS5760M returns ACK if setting the 0x6D to TAS5760M as the device address. So, I don't know why it fails for the 0x6C address."
Are there any problem about device address setting of TAS5760x? There is no information about root cause in that thread..

Hi Hikaru.

About your questions:

#2 Yes, both left and right channel volume can be dynamically changed.

#3 You met the same problem now? I think if you set the right configuration (connect SPK_SLEEP/ADR pin to low or high) the corresponded address should be no problem.

BR.

Wei Qiu.

Hi Wei

Wei Qiu said:

#2 Yes, both left and right channel volume can be dynamically changed.

How about the "Volume Control Configuration(0x03)"?
Mute R and Mute L resisters also can change dynamically?

Wei Qiu said:

#3 You met the same problem now?

Yes. As above thing, we are facing that return NACK when we set slave adress 0x6C.
SPK_SLEEP / ADR pin is connected Low(=system GND) correctly.

Hi Hikaru.

Hikaru Nozaki said:

How about the "Volume Control Configuration(0x03)"?
Mute R and Mute L resisters also can change dynamically?

Yes, mute is the same as adjust volume. Mute is to reduce the volume <-100dB.

You can also take below startup and shutdown sequence as a reference. The mute operation is under play mode.

Hikaru Nozaki said:

Yes. As above thing, we are facing that return NACK when we set slave adress 0x6C.
SPK_SLEEP / ADR pin is connected Low(=system GND) correctly.

About this issue, I have some doubts need to confirm with you:

1. When this problem occurs, it will fail no matter how many times you send to the address?
2. Something can help you find where have problem:

• The address should be 110110x[R/W]. So, when you write, the addresses should be 11011000(0xD8), 11011010(0xDA), rather than 0x6D and 0x6C.
• When you startup, please strictly follow the sequence recommended in the datasheet, as below. And you should keep the SPK_SLEEP/ADR pin strong pull-up or pull down (avoid any glitch) when power up.

Hope this can help you to find the root cause.

BR.

Wei Qiu.

Hi Wei

Wei Qiu said:

When this problem occurs, it will fail no matter how many times you send to the address?

When I tried set 0x00 and 0x01 alternately for subaddress 0x04(Left Channel Volume Control), I2C errors(return NACK) occurred approximately 50% of the time.

Wei Qiu said:

the addresses should be 11011000(0xD8), 11011010(0xDA),

As above picture, I send 0xD8 for device address and write bit. And also the SPK_SLEEP/ADR pin is be Pull down storongly.

Hi Hikaru

   From previous E2E, seems 0xDA would be more reliable, could we consider to use this one? And 0xD8 may need to re-send the codes after you find NACK issue.