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SRC4192: Input Clock Halting with Master Mode for Output Port

Part Number: SRC4192


BCKO, LRCKO and SDOUT continue to be output even if BCKI, LRCKI and SDIN are asserted to low using SRC4192 with the master mode for the output port(e.g. : MODE2/MODE1/MODE0 = 0/1/1)
Moreover, the invalid data from SDOUT is outout continuously and /RDY pin remains low.
Is this behavior normal ?

Best regards,