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DAC7568: how to drive DAC7568 with C2000 MCU?

Part Number: DAC7568
Other Parts Discussed in Thread: TMS320F28379D, , C2000WARE

Hello TI.

I want to drive DAC7568 with TMS320F28379D. I am wondering how to configure the SPI registers of the DSP.

The data format required by DAC7568 is 32-bit, but the DSP only supports 16-bit. Therefore, I think I should transfer two 16-bit word continuously. This means the SPIFFCT.TXDLY should be configured to: 0h (R/W) = The next word in the TX FIFO buffer is transferred to SPITXBUF immediately upon completion of transmission of the previous word.

However, as required by the DAC7568, the CS high time should be 80 ns minimum. This means the time delay of 80 ns or higher should be inserted between every two 32-bit data. 

So, how to configure the SPI module if I want to transfer 8 data to the DAC without waiting for the completion of transferring a 32-bit data?

By the way, does TI provide example code in such situation?

  • Hello,

    The data format required by DAC7568 is 32-bit, but the DSP only supports 16-bit. Therefore, I think I should transfer two 16-bit word continuously. This means the SPIFFCT.TXDLY should be configured to: 0h (R/W) = The next word in the TX FIFO buffer is transferred to SPITXBUF immediately upon completion of transmission of the previous word.

    Yes, this would be one way to do it. You should also enable FIFO mode and always write two 16-bit values to the FIFO to ensure the CS pin stays low for the entire 32-bit transfer.

    However, as required by the DAC7568, the CS high time should be 80 ns minimum. This means the time delay of 80 ns or higher should be inserted between every two 32-bit data. 

    So, how to configure the SPI module if I want to transfer 8 data to the DAC without waiting for the completion of transferring a 32-bit data?

    The easiest method would be to poll for the RX FIFO level status to be equal to 2 after writing 2 16-bit values to the TX FIFO. By polling the RX FIFO you can ensure the full 32 bits have been transmitted since SPI will always receive data for every data it transmits. You can insert a small CPU NOP delay to ensure the 80ns high time of the CS pin if you like. At CPU=200Mhz, this is only 16 NOPs. If you don't want to waste CPU cycles doing a poll, you can enable interrupts. 

    By the way, does TI provide example code in such situation?

    Not for this specific use case, but there are some generic examples you can leverage in c2000ware.

    C:\ti\c2000\C2000Ware_4_03_00_00\driverlib\f2837xd\examples\cpu1\spi