Other Parts Discussed in Thread: MSP432E401Y
Tool/software:
Hi there,
I am using a MSP432E401Y and an ADS8329 to sample a baseband signal. The SSI port of the MSP432 is used to read the conversion result. A GPIO pin PF5 is used as the trigger signal to trigger each ADC conversion.
The issue is when I clear the pint PF5 and then set the PF5 to trigger the ADC and then read the results. I get a large delay between two reading frames, and the ADC sampling period is about 2us (the scope result can be found in this link - https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1427196/msp432e401y-msp432e401y-ssidataget-delay/5473065#5473065).
This is much larger than the desired 1us conversion period (1MHz sampling rate), and I want to get a higher conversion rate. May I use the SSI port's FSS signal as the ADS8329's /CONVST signal? This way, I do not need to clear and then set PF4, and I will save some time to get a faster conversion.
Thanks a lot,
Zhonghai