DS90UB928Q-Q1: Device is very hot to touch, please help check hardware design.

Hi Wei,

I will review this schematic, please allow me at most a week to get back with findings related to the temperature issue.

For clarification,

Wei Xiao said:

we can hardly hold a finger on it, while the UB928 on OEM display is barely warm if at all.

Would you be able to confirm the following:

- If I understand the system setup correctly, there are two UB928's being used, connected to one UB927, and only one of them is getting hot?

Best,

Miguel

There is only one UB928 connected to UB927 at a time. We are designing an aftermarket device replacing OEM display  to interface with OEM HMI. The UB927 is on OEM HMI. Our device has one UB928 and OEM display has one UB928， and only one of them can be connected to OEM HMI at a time.

Hi Wei,

Thank you for the clarification! I will continue reviewing the schematic.

Please expect a review response 1-3 days.

Best,

Miguel

Hi Wei,

Would you be able to provide information on the layout? It seems the schematic connections may be fine for the application, but it's possible the thermal issues the design experiences could originate from PCB specifications.

Would you be able to provide how many layers are being used, the number of vias associated with the IC, and if you are following the recommendations given by "Example Board Layout" in our 928 datasheet?

Best,

Miguel

Hi Miguel,

The PCB only have two layers. Board thickness 1.2mm. Copper layer 1OZ. Please see attached two pics. The UB928 is on the top layer and LT9211C is on the bottom layer. 16 vias for UB928.

Hi Wei,

Wei Xiao said:

The PCB only have two layers. Board thickness 1.2mm.

From DS90UB928Q-Q1 5 MHz to 85 MHz 24-bit Color FPD-Link III to FPD-Link Deserializer With Bidirectional Control Channel datasheet (Rev. C), Section "11 Layout" details that the recommendation is at least a four-layer board using power and ground planes.

There are other specifications that are recommended here as well, including spacing out certain signal paths to avoid additional unaccounted for impedances. In the Example Board Layout under the same document, Section 13, there is also an additional 5 vias under the IC, this may help thermal distribution through the ground planes - but that depends on how the ground planes will be distributed.

Please let me know if the design meets the qualifications described in 11.1 Layout Guidelines and let me know if you have any questions regarding the information provided.

Best,

Miguel

Thank you. We will review the information and make improvements accordingly.

Thanks Wei,

Let me know if you come across any updates.

Best,

Miguel