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TMS570LC4357: ADC + DMA + HW-Trigger

Part Number: TMS570LC4357

Hi all,

I am using ADC1_GP1 - triggered by HET - along with DMA.  I am trying to place the data in the following way into the destination buffer.

uint16_t buf[40]:

I know how to do this for one channel (imagine the picture without the blue parts in the 3rd column):

    -  ADC-DMA configuration is set to block transfer, the block size being the number of adc channels, simply one.

     - The DMA src address is set to  adcREG1->GxBUF[adcGROUP1 + 2  (0xFFF7C0B2), fixed

     - DMA dest address is set to top of the buffer, increments automatically

     - DMA Frame-Counter is set to 20, Element-Cnt to 1. 

     - DMA interrupts are  fired when half/full blocks are transferred

   

x-Channels (for  x = 2):

 - do I still set ADC-DMA to block transfer? => one DMA request after 2 results are written into the ADC's result buffer

  - Frame size is still 20 but 2 elements per frame now?

  -  Should the dest element offset be set to 20 Byte in order to place the samples of CH1 to the blue locations depicted on the left?

  - do I still  set DMA src address to adcREG1->GxBUF[adcGROUP1 + 2  (0xFFF7C0B2)? It needs to increment after reading one element, how do I do that?

Thanks for your help in advance

Juergen

  • Hi Juergen,

    I will study your use case, and come back to you later. 

  • Hi Juergen,

     - do I still set ADC-DMA to block transfer? => one DMA request after 2 results are written into the ADC's result buffer

    You can use block transfer. You can configure BLOCK to be 2, so ADC will generate a DMA request at the end of CH1 conversion.

    You can also configure BLOCK count to be 20, then ADC module will generate a DMA request at the end of 20th conversion. DMA controller should complete reading out 20 data before next set of 20 conversions complete.

    - Frame size is still 20 but 2 elements per frame now?

    Frame size is 2, and frame count is 20

      -  Should the dest element offset be set to 20 Byte in order to place the samples of CH1 to the blue locations depicted on the left?

    Element size = 16 bit

    Element count = 2

    Frame count = 10

    Element index = 20 (bytes)

    Frame index = 2 (bytes)

    do I still  set DMA src address to adcREG1->GxBUF[adcGROUP1 + 2  (0xFFF7C0B2)? It needs to increment after reading one element, how do I do that?

    I think the src address is adcREG1->GxBUF[adcGROUP1].BUF0 or (0xFFF7C0B2)

  • Hi QJ,

    I am actually still a little confused. I simplified the problem, it's easier to understand then.

    I am sampling two ADC-channels four times in double buffer scheme. Meaning, I set interrupts for Half-Block-Complete and Block-Complete. The application works with one part of the buffer while ADC/DMA fill the other. 

    Here is the situation when hitting the HBC-Interrupt:

    Looks fine, ADC1_GP1_Buffer[0] is now read for the application.

    Here is the situation when hitting the BC-Interrupt:

    I expected DMA to continue at location ADC1_GP1_Buffers[1][0]. Instead it starts writing the data at location ADC1_GP1_Buffers[0][4]. 

    The ADC's DMA-Control-Register is set to:

    G1_BLOCKS: 2

    DMA_G1_END: 1

    G1_BLK_XFER:1

    I expect it to trigger a DMA request after the the ADC has sampled the two channels.

    I am not sure how G1_BLOCKS is connected to the ADC's Fifo size, if it is connected at all:

    Thans for your help again.

    Regards,
    Juergen

  • It's actually not confusing, where else but in ADC1_GP1_Buffers[0][4] would frame 5 be transferred to, Sorry for the confusion. I just rearrange my buffers.

    Thanks,

    Juergen

  • Hi Juergen,

    Have you make it work?

  • Hi QJ,

    sort of, at least I understand how DMA works. Maybe not in all it's details, but I understand the basics. Found out that my approach isn't really feasible due to the bounderies of the element offeset sizes. It's not large enough for large sample depths. I'll look into chaining DMA requests, should be possible to arrange my data with chaining.

    Regards,
    Juergen

  • Thanks Juergen. Let's know after you make it work.