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TMDSRM48HDK: Ethernet testing

Monish27
Intellectual 636 points
Part Number: TMDSRM48HDK
Other Parts Discussed in Thread: HALCOGEN, RM48L952, DP83640

Hi TI,

We are testing the ethernet interface in RM48 HDK. Below are the doubts faced during testing.

i. Whether HDK supports both MII and RMII interface?  Is there any HW/SW changes required in HDK board for testing the RMII interface?

ii. How to configure the RMII interface in RM48 HDK? How to determine whether the communication speed is 10/ 100 Mbps or Full-/Half-Duplex?

iii. How to read the 5-bit PHY address of the ethernet switch from the HDK?

iii. Is it possible to test the ethernet frame without the TCP/IP stack(ie only with EMAC transmit and receive)? Is there any tool available to monitor the ethernet raw data?

iv. Any sample application code available for interfacing EMAC module in RMII interface with external ethernet switch for RM48 HDK?

v. What is the purpose of Halcogen example application for ethernet ( example_EMAC_Loopback_TxRx.c)? How to test this application?

vi. On our custom board, we are interfacing KSZ8863RLLI ethernet switch (RMII) with RM48L952 MCU, is there any application note available on how to interface for the different switches?

vii. How to generate the 50 MHz clock from RMII_REFCLK (K19)? Whether this need to be configured in Halcogen? If yes, how to do it?

Please reply ASAP.

Regards,

Monish P

  • 0
    TI__Guru**** 193226 points
    Monish27 said:
    i. Whether HDK supports both MII and RMII interface?  Is there any HW/SW changes required in HDK board for testing the RMII interface?

    Yes, The device supports both MII and RMII. The HDK supports MII by default. If you want to use RMII, some changes must be make to the HDK.

    Monish27 said:
    ii. How to configure the RMII interface in RM48 HDK? How to determine whether the communication speed is 10/ 100 Mbps or Full-/Half-Duplex?

    For RMII mode, the PHY DP83640 uses 50 MHz reference at X1 reference clock input for both transmit and receive. But MII mode uses 25MHz.

    For RMII mode, the RX_DV pin of PHY DP83640 should be pulled HIGH.

    When Auto-Negotiation is enabled, the ANAR register is used to configure the speed.

    When Auto-Negotiation is disabled, the SPEED SELECTION bit in the BMCR register controls switching between 10 Mb/s or 100 Mb/s operation.

  • 0 in reply to QJ Wang
    TI__Guru**** 193226 points
    Monish27 said:
    iii. How to read the 5-bit PHY address of the ethernet switch from the HDK?

    Please check the PHY ADDRESS [4:0] ( COL, RXD_3, RXD_2, RXD_1, RXD_0) on HDK. The default value is [00001]. This means the PHY address is 0x1.

    Monish27 said:
    iii. Is it possible to test the ethernet frame without the TCP/IP stack(ie only with EMAC transmit and receive)? Is there any tool available to monitor the ethernet raw data?

    Yes, it is possible. I don't have working example. You can use loopback to text TX and RX.

  • 0 in reply to QJ Wang
    TI__Guru**** 193226 points
    Monish27 said:
    iv. Any sample application code available for interfacing EMAC module in RMII interface with external ethernet switch for RM48 HDK?

    I think the driver generated by HALCOGen works for MII and RMII. But I didn't test RMII.

    Monish27 said:
    v. What is the purpose of Halcogen example application for ethernet ( example_EMAC_Loopback_TxRx.c)? How to test this application?

    You can use it to test the functionality of the EMAC with the driver from HALCoGen.

  • 0 in reply to QJ Wang
    TI__Guru**** 193226 points
    Monish27 said:
    vi. On our custom board, we are interfacing KSZ8863RLLI ethernet switch (RMII) with RM48L952 MCU, is there any application note available on how to interface for the different switches?

    No, I don't have any app note for TMS570 + KSZ8863.

    Monish27 said:
    vii. How to generate the 50 MHz clock from RMII_REFCLK (K19)? Whether this need to be configured in Halcogen? If yes, how to do it?

    It requires 50Mhz input to PHY (DP83640) on X1 pin as the RMII reference clock.