This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MCU-PLUS-SDK-AM243X: Enet(CPSW) can not be used with PRU(ICSS)

Part Number: MCU-PLUS-SDK-AM243X

Tool/software:

Hi,

I am using mcu_plus_sdk_am243x_09_02_00_50 with EVM board. I need to get data from PRU1 to R5F0_0 and then sent the data to ENET_MAC_PORT_1 in R5F0_0, under noRTOS environment.

Thus, I try to understand the examples in mcu_plus_sdk_am243x_09_02_00_50:

example 1:\examples\pru_io\adc\ads85x8\am243x-evm\r5fss0-0_freertos

example 2:\examples\networking\enet_layer2_cpsw\am243x-evm\r5fss0-0_freertos

I modify the template to meet my requirement and I can successfully execute them separately, then I try to integrate them, and problems occurs.

To verify my suspicions, I just add "PRU(ICSS) GPIO" under "additional ICSS settings" in example 2, no other operations. Then, I cannot send and receive frame from PHY.

Please tell me why? Thanks.

I also see this, but I don't need to use Enet(ICSS), I use Enet(CPSW).

BRs

Xiangju

  • Hi Xiangju,

    So, there are 2 parts to your project: PRU -> R5F data transfer and R5F -> CPSW port transfer

    When you integrate them, is the PRU -> R5F data transfer part working properly?

    I also see this, but I don't need to use Enet(ICSS), I use Enet(CPSW).

    Since you are using CPSW, ICSSG0 usage does not concern you.

    I tried adding the PRU GPIOs to the enet_layer2_cpsw example, I am still able to send and receive frames from the CPSW port. Can you power reset the board and try again? With only the addition of PRU GPIO, I do not expect the example to fail.

    Regards,

    Nitika

  • When you integrate them, is the PRU -> R5F data transfer part working properly?

    Yes, it works well.

    If I add GPI0~GPI6, I am still able to send and receive frames from the CPSW port.

    If I add GPI0~GPI7, I cannot send and receive frames from the CPSW port.

    Can you also try to see if you have the same phenomenon?

  • Hi,

    I do see the same phenomenon happening.

    The reason for that is the PRU GPO pins below from ICSSG0 are muxed with CPSW pins. 

    When you select the above pins from PRU ICSS section, the CPSW pins change to any other available pins causing the example functionality to break.

    You will not be able to use the above 6 pins that are from PRU1 in your usecase. 

    Now, based on this I would like to know if the use of ADS8588 is a necessary requirement for your project or you can look at other ADC implementation as well?

    Regards,

    Nitika

  • Hi,

    Now, based on this I would like to know if the use of ADS8588 is a necessary requirement for your project or you can look at other ADC implementation as well?

    In my case, I need to use GPI0~GPI15 (PRU_ICSSG0_PRU1) in total. 

    In TI enet_layer2_cpsw example, RGMII1_IOSet_1 and RGMII2_IOSet_1 are used, when I try to disable RGMII2 and enable RGMII1_IOSet_2  in the example (without adding PRU_IO),  I cannot send and receive frames from the CPSW port as well, I'm confused about this, why this happen? 

    I want to disable RGMII2 and enable RGMII1_IOSet_2 due to the PRU GPI pins from PRU_ICSSG0_PRU1 will not be muxed with CPSW pins in this way. 

  • Hi Xiangju,

    Let me try this on my end and get back to you.

    Regards,

    Nitika

  • Hi Nitika,

    Do you have some new information that can be shared? Thanks.

    BRs

    Xiangju

  • Hi Xiangju,

    I am seeing the same failure on my setup as well - Disabling RGMII2 and switching to IOSet_2 for RGMII1 with AM243x-evm is not working.

    However, during my testing I found that the same configuration works with AM243x-lp board.

    I am discussing this internally, comparing the configuration between the 2 boards should be helpful.

    I will get back to you once we have an update or workaround for this.

    Regards,

    Nitika

  • Hi Nitika,

    I am waiting for your reply. Is there a problem with the configuration? 

    Best Regards

    Xiangju

  • Hi Xiangju,

    I have verified the issue you are facing on my setup as well.

    It is most likely a configuration issue as you mentioned. I have filled a bug on this, the dev team is looking into it.

    Regards,

    Nitika

  • Hi Nitika,

    Thanks for your reply.

    Looking forward to hearing back from you when the issue is resolved. Thanks.

    BRs

    Xiangju

  • Hi Nitika,

    I think I make a mistake. From EVM board design spec, I can only use IOSet_1 for RGMII1 with AM243x-evm unless I change the board's pin connections. Is that true?

    BRs

    Xiangju

  • Hi Xiangju,

    Apologies for the delayed response, I was not available the last week.

    The dev team has reviewed the issue and they have suggested a working configuration for your use case - Utilising MAC port 2 and PRU GPIOs

    Please follow the steps below to implement that:

    1. From Enet (CPSW) > MAC Port Config, Select the 'Disable Mac Port 1' option under MAC Port 1 Config and deselect that option under MAC Port 2 Config

    2. Enable GPI0~GPI15 (PRU_ICSSG0_PRU1) from PRU (ICSS).

    3. From Enet (CPSW) > Pinmux config, Deselect the option 'Enable RGMII1 for CPSW'. The settings should resemble the one below:

    4. Modify the file l2_cpsw_main.c to use ENET_MAC_PORT_2 in the global variable testParams as below:

    /* Use this array to select the ports that will be used in the test */
    static EnetApp_TestParams testParams[] =
    {
        { ENET_CPSW_3G,  0U, ENET_MAC_PORT_2 /*ENET_MAC_PORT_1*/, "cpsw-3g", },
    };

    5. Save the configuration, re-build and test the example.

    I have tested this on my end and the functionality is working as expected.

    Regards,

    Nitika

  • Hi, Nitika,

    Thanks for your reply.

    I config following your steps, but from my end, it fails to link up:

    BRs

    Xiangju

  • Hi Xiangju,

    Can you confirm that you are connecting to MAC Port 2 after making the above changes?

    Regards,

    Nitika

  • Hi Nitika,

    I am so stupid. Thanks a lot. It works.

    BRs

    Xiangju