LP-AM243: Sending message from one core to another takes around 30-70 microseconds

coderAkdr

Part Number: LP-AM243
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello;

I created a demo application that sends 18 byte data from 1 core to another and receives response.

Step-1: first core sends 18 byte data with RPMessage_send with parameter of SystemP_WAIT_FOREVER (Second core is waiting with RPMessage_recv(......SystemP_WAIT_FOREVER and sends same data once it received)
Step-2 the core calls RPMessage_recv method with parameter of SystemP_WAIT_FOREVER
Step-3: After checking of time differences between sendtime and received time, I have some time values below;

It took 70 microseconds to send an 18 byte message from m4 core to r5-0-0 core and receive a response of the same length.
When the same process is applied from r5 0-1 to r5 0-0, the time taken is 32 microseconds.

What do you think about this time differences?

Q-1: Why time difference between m4 and r5-0-0 takes longer than r5 1-0 and r5 0-1?
Q-2: I think 32 microsecond and 70 microseconds are quite long time? Do you think that time differences is usual? Is there a way to make it faster? (Data size could be longer in real life scenarios)
Q-3: If I activate SafeIPC option, how much affect would I have?

Regards
Kadir

1 month ago

+1 Tushar Thakur 1 month ago

TI__Mastermind 27153 points

Hi Kadir,

Thanks for your query.

coderAkdr said:
Q-1: Why time difference between m4 and r5-0-0 takes longer than r5 1-0 and r5 0-1?

This is because of access latency while M4F core is accessing the MSRAM memory as it belongs to the MAIN domain.

coderAkdr said:
Q-2: I think 32 microsecond and 70 microseconds are quite long time? Do you think that time differences is usual? Is there a way to make it faster? (Data size could be longer in real life scenarios)

This is the usual difference. To see the performance number for IPC communication. Please refer DATASHEET_AM243X_EVM.

coderAkdr said:
Q-3: If I activate SafeIPC option, how much affect would I have?

Enable/Disable SafeIPC. If Enabled, the Shared memory is organized in a way that allows Firewalling. Only Sender and Receiver core will have access to the VRING. Firewall configuration is not part of IPC SysCfg module. It has to be done separately. The SysCfg generated code has comments on the Start and End addresses and the involved cores. This can be used during the firewall configuration. Data Integrity Check has to be handled in application. CRC can be sent as a part of Payload and decoded in the receiver end.

Regards,

Tushar

0 coderAkdr 1 month ago in reply to Tushar Thakur

Prodigy 100 points

Hi Tushar;

Thanks for your response. It looks like similar latency but I think, to make it faster possible. Maybe my clock speed is low.
In my sysconfig file should I set clock frequency. Could you please help me to check if it is fast enough??

Best

Kadir

+1 Tushar Thakur 1 month ago in reply to coderAkdr

TI__Mastermind 27153 points

Hi Kadir,

coderAkdr said:
Maybe my clock speed is low.
In my sysconfig file should I set clock frequency. Could you please help me to check if it is fast enough??

I assume that you have initialized the SoC with the default SBL binaries.

In the SBL example, Both the R5F and M4F core are set to their higher operating frequency which is 800 MHz and 400 MHz respectively.

Regards,

Tushar

0 coderAkdr 1 month ago in reply to Tushar Thakur

Prodigy 100 points

Hi;

Perfect, I can check from there. But I was not able to find this SBL example.

Maybe you could share a link??

Regards

Kadir

0 Tushar Thakur 1 month ago in reply to coderAkdr

TI__Mastermind 27153 points

Hi Kadir,

coderAkdr said:
Perfect, I can check from there. But I was not able to find this SBL example.

Please refer https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/latest/exports/docs/api_guide_am243x/EXAMPLES_DRIVERS_SBL.html

Regards,

Tushar

0 coderAkdr 1 month ago in reply to Tushar Thakur

Prodigy 100 points

Hi Tushar;

Thanks for quick response.

Should I set the clock speed at bootloader level? Can't I do this via shortcut in project sysconfig file? If yes which field?

Regards
Kadir

+1 Tushar Thakur 1 month ago in reply to coderAkdr

TI__Mastermind 27153 points

Hi Kadir,

Yes, you will need to set the frequency in bootloader example itself. Sysconfig doesn't provide option to configure Core's frequency.

Regards,

Tushar

0 coderAkdr 1 month ago in reply to Tushar Thakur

Prodigy 100 points

How can I see my current clock speed with current bootloader which is already installed???

0 Tushar Thakur 1 month ago in reply to coderAkdr

TI__Mastermind 27153 points

Hello Kadir,

Please refer to the bootloader_soc.c file for details.

This file can be found at path ${MCU+SDK}/source/drivers/bootloader/soc/am64x_am243x/bootloader_soc.c.

Regards,

Tushar

0 coderAkdr 1 month ago in reply to Tushar Thakur

Prodigy 100 points

Thanks Tushar;

It looks like it works with max clock hz if when we do not change anything;

{
.tisciProcId = SCICLIENT_PROCID_MCU_M4FSS0_C0,
.tisciDevId = TISCI_DEV_MCU_M4FSS0_CORE0,
.tisciClockId = TISCI_DEV_MCU_M4FSS0_CORE0_VBUS_CLK,
.defaultClockHz = (uint32_t)(400*1000000),
.coreName = "m4f0-0",
},

{
.tisciProcId = SCICLIENT_PROCID_R5_CL0_C0,
.tisciDevId = TISCI_DEV_R5FSS0_CORE0,
.tisciClockId = TISCI_DEV_R5FSS0_CORE0_CPU_CLK,
.defaultClockHz = (uint32_t)(800*1000000),
.coreName = "r5f0-0",
},

For r5 800 MHZ, for m4 it is 400 MHZ.

Thanks for all your shares...

Regard
Kadir

0 Tushar Thakur 1 month ago in reply to coderAkdr

TI__Mastermind 27153 points

Hello Kadir,

coderAkdr said:
It looks like it works with max clock hz if when we do not change anything;

Yes, correct.

Closing the thread as original query has answered.

coderAkdr said:
Thanks for all your shares...

Happy to help.

Regards,

Tushar

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LP-AM243: Sending message from one core to another takes around 30-70 microseconds