TMS570LS3137: I2C clock configuration

Hi Francois,

Francois DUGUE said:

Following datasheet formula, to obtain a 400kHz I2C bus, i should configure CLKH to 7 and CLKL to 8

You are correct the values should be 7 and 8 only.

Francois DUGUE said:

However, in order to obtain 400kHz, i had to configure CLKH to 4 and CLKL to 4...meanning a wrong VCLK frequency.

How are you verifying this?

Why are you suspecting VCLK wrong? Are you sure about all the other configurations? Please make sure the following things in their corresponding registers.

I2CPSC should be 8

I2CCLK and I2CCLK should be 5.

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Thanks & regards,
Jagadish.

Hi Jagadish, thank you for the reply.

To check I2C frequency, i use an osciloscope.

Can you elaborate on your answer?

first you said i am correct with CLKH=7 and CLKL=8, then you said they should be 5...

How did you get the value of 5?

VCLK = 90MHz (checked with an osciloscope on ECLK pin).

I2CPSC = 8,

ModuleClockFrequency = VCLK / (I2CPSC + 1) = 10MHz; also D value is 5.

MasterClockFrequency = ModuleClockFrequency / ((CLKH + D) + (CLKL + D)).

400kHz = 10MHz / ((7 + 5) + (8 + 5))

am I wrong?

but with 7 and 8, i got 312kHz

here with 4 and 4 values

Francois DUGUE said:

How did you get the value of 5?

Sorry my bad it is a typo,

The combined value of I2CCLK and I2CCLK should be 15

Well, i'm sorry but "combined value" is a new item here.

Where do you find this item? How do you calcultate it?

Here is my calculation:

Hi, Jagadish.

Thank you for sharing this computation.

We are align on computation method. I should set 7 and 8 as CLKL/H configuration value.

However by using theses values, i haven't the right I2C frequency as output...

Hi Francois,

I don't have this board with me now, so is it possible to share your complete project for verification at my end?

I will quickly verify and will provide my suggestions.

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Thanks & regards,
Jagadish.

I'm sorry but i'm not allowed to share the project.

Here is the part of code used to check VCLK with an oscilloscope

//set ECPCLKFUN bit to 1 in SYSPC1
systemREG1->SYSPC1 = 1U;
//set output direction
systemREG1->SYSPC2 = 1U;
//set pull up-down
systemREG1->SYSPC9 = 1U;
//LEAVE CLK_TEST_EN in CLKTEST to use ECPNTL 
//ECPCNTL set by default to VCLK + STOP on suspend + divide by 900
systemREG1->ECPCNTL = (uint32)((uint32)0U << 24U)
                        | (uint32)((uint32)0U << 23U)
                        | (uint32)((uint32)(900U - 1U) & 0xFFFFU);
// 90MHz divide by 900 give 100kHz signal

While waitting for your feedback, i'll try different configuration on the HDK...

Thanks in advance for your tests.

Regards.

Or else is it possible to have one live demo session, there you can share your screen and i will verify your configurations and guide you in according to it.

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Thanks & regards,
Jagadish.

Hi.

I'm not allowed to do this.

When do you think you can check on your side?

Hi, i have done another test. I have generated a new project with Halcogen to use with the HDK.

and again, the generated clock is not 400kHz but something like 312kHz.

I'm waiting for your feedback

Hi Francois,

Are you using HALCoGen for your application to generate driver level code or not?

I am checking this because, if we use HALCoGen then we no need to bother about in between values instead of we can just directly give the required Baudrate at below box:

It will automatically calculate all the values.

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Thanks & regards,
Jagadish.

I have written the driver level code for the product project, which show the issue.

I have generated a new project with HalCoGen, and using files and values, it show the same issue regarding I2C baudrate.

Hi Francois,

As i mentioned previously i don't have this board. So i took another Hercules board (TMS570LC4357).

For this board i took one existing I2C example and i configured the baudrate as 400Kb

Here i noticed one interesting observation:

Here is the I2C waveforms with 400K baudrate at VCLK 75Mhz:

Here is the I2C waveforms with 400K baudrate at VCLK 90Mhz:

When i configured 75MHz VCLK to the I2C module then i don't see any issues in the generated baudrate(i mean i got 411K baudrate), whereas when i configured 90MHz VCLK to the I2C module then the generated baudrate is not correct (i got 2.4K only).

And also, i noticed that in 90Mhz case also the prescaler and CLKH and CLKL dividers set to the correct values only. 

Maybe i am suspecting this, the input frequency 90Mhz to the I2c instance is may does not support by the module. I will do further analysis related to this to confirm it. And mean time i am suggesting you try with 75Mhz VCLK and test it on your end.

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Thanks & regards,
Jagadish.

 Hi, thank you for this test.

I'll do the test with 75Mhz clock... i have already do it with VCLK 8MHz, showing the same issue...