TMS570LC4357: Discrepancy and Missing Descriptions for Clock Source Fields in RCLKSRC, VCLKASRC, and GHVSRC Registers

Tool/software:

Hello

I think, i have identified discrepancies and potential omissions in the documentation ,SPNU563A–March 2018,  of the RTI1SRC field in the RCLKSRC register, the VCLKA2S and VCLKA1S fields in the VCLKASRC register, and the GHVWAKE, HVLPM, and GHVSRC fields in the GHVSRC register. These fields reference clock sources but lack clear information on the valid values, especially with respect to unimplemented clock sources as detailed in Table 2-29: Clock Sources Table.

Discrepancy Details:

1. RCLKSRC Register - RTI1SRC Field:

   • Current Description:

     3-0 RTI1SRC RTI clock1 source.
     0 Clock source0 is the source for RTICLK1.
     1h Clock source1 is the source for RTICLK1.
     2h Clock source2 is the source for RTICLK1.
     3h Clock source3 is the source for RTICLK1.
     4h Clock source4 is the source for RTICLK1.
     5h Clock source5 is the source for RTICLK1.
     6h Clock source6 is the source for RTICLK1.
     7h Clock source7 is the source for RTICLK1.
     8h-Fh VCLK is the source for RTICLK1.
     

   • Discrepancy: Clock source2 is listed as "Not Implemented" in Table 2-29, but it is shown as a valid source in the field description.

2. VCLKASRC Register - VCLKA2S and VCLKA1S Fields:

   • Current Description:

     11-8 VCLKA2S Peripheral asynchronous clock2 source.
     0 Clock source0 is the source for peripheral asynchronous clock2.
     1h Clock source1 is the source for peripheral asynchronous clock2.
     2h Clock source2 is the source for peripheral asynchronous clock2.
     3h Clock source3 is the source for peripheral asynchronous clock2.
     4h Clock source4 is the source for peripheral asynchronous clock2.
     5h Clock source5 is the source for peripheral asynchronous clock2.
     6h Clock source6 is the source for peripheral asynchronous clock2.
     7h Clock source7 is the source for peripheral asynchronous clock2.
     8h-Fh VCLK is the source for peripheral asynchronous clock2.
     

   • Discrepancy: Similar issue as above, clock source2 is listed as "Not Implemented".

3. GHVSRC Register - GHVWAKE, HVLPM, and GHVSRC Fields:

   • Current Description:

     27-24 GHVWAKE GCLK1, HCLK, VCLK source on wakeup.
     0 Clock source0 is the source for GCLK1, HCLK, VCLK on wakeup.
     1h Clock source1 is the source for GCLK1, HCLK, VCLK on wakeup.
     2h Clock source2 is the source for GCLK1, HCLK, VCLK on wakeup.
     3h Clock source3 is the source for GCLK1, HCLK, VCLK on wakeup.
     4h Clock source4 is the source for GCLK1, HCLK, VCLK on wakeup.
     5h Clock source5 is the source for GCLK1, HCLK, VCLK on wakeup.
     6h Clock source6 is the source for GCLK1, HCLK, VCLK on wakeup.
     7h Clock source7 is the source for GCLK1, HCLK, VCLK on wakeup.
     8h-Fh Reserved
     
     19-16 HVLPM HCLK, VCLK, VCLK2 source on wakeup when GCLK1 is turned off.
     0 Clock source0 is the source for HCLK, VCLK, VCLK2 on wakeup.
     1h Clock source1 is the source for HCLK, VCLK, VCLK2 on wakeup.
     2h Clock source2 is the source for HCLK, VCLK, VCLK2 on wakeup.
     3h Clock source3 is the source for HCLK, VCLK, VCLK2 on wakeup.
     4h Clock source4 is the source for HCLK, VCLK, VCLK2 on wakeup.
     5h Clock source5 is the source for HCLK, VCLK, VCLK2 on wakeup.
     6h Clock source6 is the source for HCLK, VCLK, VCLK2 on wakeup.
     7h Clock source7 is the source for HCLK, VCLK, VCLK2 on wakeup.
     8h-Fh Reserved
     
     3-0 GHVSRC GCLK1, HCLK, VCLK, VCLK2 current source.
     0 Clock source0 is the source for GCLK1, HCLK, VCLK, VCLK2.
     1h Clock source1 is the source for GCLK1, HCLK, VCLK, VCLK2.
     2h Clock source2 is the source for GCLK1, HCLK, VCLK, VCLK2.
     3h Clock source3 is the source for GCLK1, HCLK, VCLK, VCLK2.
     4h Clock source4 is the source for GCLK1, HCLK, VCLK, VCLK2.
     5h Clock source5 is the source for GCLK1, HCLK, VCLK, VCLK2.
     6h Clock source6 is the source for GCLK1, HCLK, VCLK, VCLK2.
     7h Clock source7 is the source for GCLK1, HCLK, VCLK, VCLK2.
     8h-Fh Reserved
     

   • Discrepancy: Same issue persists where clock source2 is listed as "Not Implemented".

Correction Proposal:

• Update all affected field descriptions to exclude clock source2 as a valid option.
  • Suggested text for affected fields:
    2h Reserved (Not Implemented)