Tool/software:
Hello,
I am trying to perform an analog loopback test for the LIN module using the SafeTI Diagnostic Library. When I call the function SL_SelfTest_LIN()
for this purpose, it fails at the step where it verifies if the LIN module is out of the reset state. The return value retVal
is set to FALSE
. Here's the code snippet that performs the reset state check:
status = SL_SelfTest_LIN(LIN_ANALOG_LOOPBACK_TEST, SL_LIN1);
/*verify LIN is not in reset state */ /*SAFETYMCUSW 439 S MR:11.3 <APPROVED> Comment_4*/ if(sl_linREG != NULL) { /*SAFETYMCUSW 134 S MR: 12.2 <APPROVED> Comment_5*/ if((LIN_GCR0_RESET_BIT|LIN_GCR1_SWRST_BIT) != (sl_linREG->GCR0 & (LIN_GCR0_RESET_BIT|LIN_GCR1_SWRST_BIT))) { #if (FUNC_ENTRY_COND_CHECK_LOG_ENABLED !=0) SL_Log_Error(FUNC_ID_ST_LIN, ERR_TYPE_ENTRY_CON, 1u); #endif retVal = FALSE; return retVal; }
As I understand, this condition checks if sl_linREG->GCR0
has the value 0x81
. However, the GCR0
register, cannot have this value, which makes me wonder if this is a bug in the SafeTI Diagnostic Library.
Here is my initialization function for LIN module
void sciInit(UartInit_t* Uart_init_struct) { /* USER CODE BEGIN (2) */ /* USER CODE END */ /** @b initialize @b SCILIN */ /** - bring SCI out of reset */ scilinREG->GCR0 = 0U; scilinREG->GCR0 = 1U; /** - Disable all interrupts */ scilinREG->CLEARINT = 0xFFFFFFFFU; scilinREG->CLEARINTLVL = 0xFFFFFFFFU; /** - global control 1 */ scilinREG->GCR1 = (uint32)((uint32)1U << 25U) /* enable transmit */ | (uint32)((uint32)1U << 24U) /* enable receive */ | (uint32)((uint32)1U << 5U) /* internal clock (device has no clock pin) */ | (uint32)((uint32)(Uart_init_struct->stop_bits-1U) << 4U) /* number of stop bits */ | (uint32)((uint32)Uart_init_struct->parity_even << 3U) /* even parity, otherwise odd */ | (uint32)((uint32)Uart_init_struct->parity_enable << 2U) /* enable parity */ | (uint32)((uint32)1U << 1U); /* asynchronous timing mode */ /** - set baudrate */ sciSetBaudrate(scilinREG,(uint32) Uart_init_struct->baud_rate ); /** - transmission length */ scilinREG->FORMAT = 8U - 1U; /* length */ /** - set SCI pins functional mode */ scilinREG->PIO0 = (uint32)((uint32)1U << 2U) /* tx pin */ | (uint32)((uint32)1U << 1U); /* rx pin */ /** - set SCI pins default output value */ scilinREG->PIO3 = (uint32)((uint32)0U << 2U) /* tx pin */ | (uint32)((uint32)0U << 1U); /* rx pin */ /** - set SCI pins output direction */ scilinREG->PIO1 = (uint32)((uint32)0U << 2U) /* tx pin */ | (uint32)((uint32)0U << 1U); /* rx pin */ /** - set SCI pins open drain enable */ scilinREG->PIO6 = (uint32)((uint32)0U << 2U) /* tx pin */ | (uint32)((uint32)0U << 1U); /* rx pin */ /** - set SCI pins pullup/pulldown enable */ scilinREG->PIO7 = (uint32)((uint32)0U << 2U) /* tx pin */ | (uint32)((uint32)0U << 1U); /* rx pin */ /** - set SCI pins pullup/pulldown select */ scilinREG->PIO8 = (uint32)((uint32)1U << 2U) /* tx pin */ | (uint32)((uint32)1U << 1U); /* rx pin */ /** - set interrupt level */ scilinREG->SETINTLVL = (uint32)((uint32)0U << 26U) /* Framing error */ | (uint32)((uint32)0U << 25U) /* Overrun error */ | (uint32)((uint32)0U << 24U) /* Parity error */ | (uint32)((uint32)0U << 9U) /* Receive */ | (uint32)((uint32)0U << 8U) /* Transmit */ | (uint32)((uint32)0U << 1U) /* Wakeup */ | (uint32)((uint32)0U); /* Break detect */ /** - set interrupt enable */ scilinREG->SETINT = (uint32)((uint32)0U << 26U) /* Framing error */ | (uint32)((uint32)0U << 25U) /* Overrun error */ | (uint32)((uint32)0U << 24U) /* Parity error */ | (uint32)((uint32)1U << 9U) /* Receive */ | (uint32)((uint32)0U << 1U) /* Wakeup */ | (uint32)((uint32)0U); /* Break detect */ /** - initialize global transfer variables */ g_sciTransfer_t[1U].mode = (uint32)1U << 8U; g_sciTransfer_t[1U].tx_length = 0U; g_sciTransfer_t[1U].rx_length = 0U; /** - Finaly start SCILIN */ scilinREG->GCR1 |= 0x80U; /* USER CODE BEGIN (3) */ /* USER CODE END */ }
GCR0 register is set to 1, which means that module is out of reset, and at the end GCR1 is set to 0x80.
Is this a software bug in the library, or is there a configuration issue on my side?
Thanks & regards,
Ilija